ZHCSH29B April 2017 – December 2018 LP87524B-Q1 , LP87524J-Q1 , LP87524P-Q1
PRODUCTION DATA.
Address: 0x1A
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| Reserved | INT_BUCK23 | INT_BUCK01 | NO_SYNC_CLK | TDIE_SD | TDIE_WARN | INT_OVP | I_LOAD_
READY |
| Bits | Field | Type | Default | Description |
|---|---|---|---|---|
| 7 | Reserved | R/W | 0 | |
| 6 | INT_BUCK23 | R | 0 | Interrupt indicating that output Buck3 and/or Buck2 have a pending interrupt. The reason for the interrupt is indicated in INT_BUCK_2_3 register.
This bit is cleared automatically when INT_BUCK_2_3 register is cleared to 0x00. |
| 5 | INT_BUCK01 | R | 0 | Interrupt indicating that output Buck1 and/or Buck0 have a pending interrupt. The reason for the interrupt is indicated in INT_BUCK_0_1 register.
This bit is cleared automatically when INT_BUCK_0_1 register is cleared to 0x00. |
| 4 | NO_SYNC_CLK | R/W | 0 | Latched status bit indicating that the external clock is not valid.
Write 1 to clear interrupt. |
| 3 | TDIE_SD | R/W | 0 | Latched status bit indicating that the die junction temperature has exceeded the thermal shutdown level. The regulators have been disabled if they were enabled. The regulators cannot be enabled if this bit is active. The actual status of the thermal warning is indicated by TDIE_SD_STAT bit in TOP_STAT register.
Write 1 to clear interrupt. |
| 2 | TDIE_WARN | R/W | 0 | Latched status bit indicating that the die junction temperature has exceeded the thermal warning level. The actual status of the thermal warning is indicated by TDIE_WARN_STAT bit in TOP_STAT register.
Write 1 to clear interrupt. |
| 1 | INT_OVP | R/W | 0 | Latched status bit indicating that the input voltage has exceeded the overvoltage detection level. The actual status of the overvoltage is indicated by OVP_STAT bit in TOP_STAT register.
Write 1 to clear interrupt. |
| 0 | I_LOAD_READY | R/W | 0 | Latched status bit indicating that the load current measurement result is available in I_LOAD_1 and I_LOAD_2 registers.
Write 1 to clear interrupt. |