SNVSCU3 October 2025 LM5137
PRODMIX
- 1
- 1 Features
- 2 Applications
- 3 Description
- 4 Related Products
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Input Voltage Range (VIN)
- 7.3.2 Bias Supply Regulator (VCC, BIAS1/VOUT1, VDDA)
- 7.3.3 Precision Enable (EN1, EN2)
- 7.3.4 Switching Frequency (RT)
- 7.3.5 Pulse Frequency Modulation and Synchronization (PFM/SYNC)
- 7.3.6 Synchronization Out (SYNCOUT)
- 7.3.7 Dual Random Spread Spectrum (DRSS)
- 7.3.8 Configurable Soft Start (RSS)
- 7.3.9 Output Voltage Setpoints (FB1, FB2)
- 7.3.10 Error Amplifier and PWM Comparator (FB1, FB2, COMP1, COMP2)
- 7.3.11 Inductor Current Sense (ISNS1+, BIAS1/VOUT1, ISNS2+, VOUT2)
- 7.3.12 Minimum Controllable On-Time
- 7.3.13 100% Duty Cycle Capability
- 7.3.14 MOSFET Gate Drivers (HO1, HO2, LO1, LO2)
- 7.3.15 Output Configurations (CNFG)
- 7.4 Device Functional Modes
-
8 Application and Implementation
- 8.1 Application Information
- 8.2
Typical Applications
- 8.2.1
Design 1 – Dual 5V and 3.3V, 20A Buck Regulator for 12V
Input Applications
- 8.2.1.1 Design Requirements
- 8.2.1.2
Detailed Design Procedure
- 8.2.1.2.1 Custom Design With WEBENCH? Tools
- 8.2.1.2.2 Custom Design With Excel Quickstart Tool
- 8.2.1.2.3 Inductor Calculations
- 8.2.1.2.4 Shunt Resistors
- 8.2.1.2.5 Ceramic Output Capacitors
- 8.2.1.2.6 Ceramic Input Capacitors
- 8.2.1.2.7 Feedback Resistors
- 8.2.1.2.8 Input Voltage UVLO Resistors
- 8.2.1.2.9 Compensation Components
- 8.2.1.3 Application Curves
- 8.2.2 Design 2 – Two-Phase, Single-Output Synchronous Buck Regulator
- 8.2.3 Design 3 – 12V, 20A, 400kHz, Two-Phase Buck Regulator for 48V Server Applications
- 8.2.1
Design 1 – Dual 5V and 3.3V, 20A Buck Regulator for 12V
Input Applications
- 8.3 Power Supply Recommendations
- 8.4 Layout
- 9 Device and Documentation Support
- 10Revision History
- 11Mechanical, Packaging, and Orderable Information
7.3.11.2 Inductor DCR Current Sensing
For high-power applications that do not require accurate current-limit protection, inductor DCR current sensing is preferable. This technique provides lossless and continuous monitoring of the inductor current using an RC sense network in parallel with the inductor. Select an inductor with a low DCR tolerance to achieve a typical current limit accuracy within the range of 10% to 15% at room temperature. Components RCS and CCS in Figure 7-6 create a low-pass filter across the inductor to enable differential sensing of the voltage drop across the inductor DCR.
Figure 7-6 Inductor DCR
Current Sensing ImplementationUse Equation 7 to calculate the voltage drop across the sense capacitor in the s-domain. When the RCSCCS time constant is equal to LO/RDCR, the voltage developed across the sense capacitor, CCS, is a replica of the inductor DCR voltage and accurate current sensing is achieved. If the RCSCCS time constant is not equal to the LO/RDCR time constant, there is a sensing error as follows:
- RCSCCS > LO/RDCR → the DC level is correct, but the AC amplitude is attenuated.
- RCSCCS < LO/RDCR → the DC level is correct, but the AC amplitude is amplified.
Choose the CCS capacitance greater than or equal to 100nF to maintain a low-impedance sensing network, thus reducing the susceptibility of noise pickup from the switch node. Carefully observe Section 8.4.1 to make sure that noise and DC errors do not corrupt the differential current sense signals applied between the respective ISNS1/2+ and VOUT1/2 pins.