4 修訂歷史記錄

Changes from H Revision (July 2015) to I Revision

• Fixed typo in power down supply current units - changed mA to uA Go

Changes from G Revision (April 2013) to H Revision

• 添加了 ESD 額定值表、特性 說明 部分、器件功能模式、應用和實施 部分、電源相關建議 部分、布局 部分、器件和文檔支持 部分以及機械、封裝和可訂購信息 部分。Go

Changes from F Revision (January 2011) to G Revision

• 已將美國國家半導體數據表的版面布局更改為 TI 格式Go

Changes from E Revision (August 2010) to F Revision

• Modified ESD to include IEC condition (330 Ohm, 150pF)Go
• Updated deserializer parameters: IDD1, IDDZ, IDDIOZ, IDDR, VOH, VOL, tROS, tRDC Go
• Updated Figure 14 and Figure 15 to reflect data measurement at VDDIO/2 Go
• Updated Figure 38 – C13 changed to 4.7uF Go

Changes from D Revision (May 2010) to E Revision

• 刪除了“數據隨機生成和擾頻”、“噪聲裕度”以及“典型性能曲線”部分Go
• 修改了訂購信息，在 NSPN 列（替代 NSID 列）中添加了 NOPB 標識Go
• Corrected ESD Ratings to IEC 61000 – 4 – 2 from ISO 10605 (duplication). Go
• Added RPU = 10k Ω condition for the Serial Control Bus Characteristics of tR and tF. Go

Changes from C Revision (March 2010) to D Revision

• DS90UR906Q-Q1 data sheet limits have been updated per characterization results Go
• Corrected register 5 from RFB to VODSEL and register 4 from VODSEL to RFB in Table 14Go

Changes from B Revision (Feburary 2010) to C Revision

• Added reference to soldering profileGo
• Added ESD CDM and ESD MM valuesGo
• Updated R_θA value Go

Changes from A Revision (September 2009) to B Revision

• 刪除了 IDDT3 和 IDDIOT3（隨機模式），原因是其限制與檢測板模式相同Go
• DS90UR905Q 數據表限制已根據特性結果更新為最終限制Go
• Updated DS90UR905Q-Q1 Typical Connection Diagram — Pin Control. Ref 30102044 Go
• Updated DS90UR906Q-Q1 Pin Diagram: strap changes on pin11, pin14, and pin42 Go
• Added strap to pin 11 “ OS_PCLK ” (Output Slew_PCLK) Go
• Changed strap pin 14 feature from “ RDS ” to “ OS_DATA ” (Output Slew_DATA) Go
• Added strap to pin 42 “ OP_LOW ” (Output LOW) Go
• Updated DS90UR906Q-Q1 Typical Connection Diagram — Pin Control. Ref 30102045 Go
• Updated DS90UR906Q-Q1 Deserializer Pin Descriptions: RDS feature changed to OS_PCLK and OS_DATA. Added OP_LOW feature Go
• Created OP_LOW timing Figure 28. Ref 30102065 Go
• Created OP_LOW timing Figure 29. Ref 30102066 Go
• Updated Table 12: deleted ID[x] Address 7'b 110 1000 (h'68) (8'b 1101 0000 (h'D0))Go
• Updated Table 13: deleted ID[x] Address 7'b 111 0000 (h'70) (8'b 1110 0000 (h'E0))Go
• Changed Table 14 ADD \ 1 \ bit \ 6:0 \ ID[x]: deleted Device ID 7b'1101 00 (h'68). Only four (4) IDs will be availableGo
• Changed Table 15: ADD \ 0 \ bit \ 6 \ OSS_SEL: “ OSS_SEL ” changed feature to “ OS_PCLK ” (Output Slew_PCLK). OSS_SEL moved to ADD \ 2 \ bit \ 6 \Go
• Changed Table 15: ADD \ 0 \ bit \ 5 \ RDS: changed “ RDS ” feature to OS_DATA (Output Slew_DATA) Go
• Changed Table 15: ADD \ 1\ bit \ 6:0 \ ID[x]: deleted Device ID 7b'1110 00 (h'70). Only four (4) IDs will be available. Go
• Changed Table 15: ADD \ 2 \ bit \ 7 \ Reserved: changed “ Reserved ” to “ OP_LOW ”Go
• Changed Table 15: ADD \ 2 \ bit \ 6 \ Reserved: changed “ Reserved ” to “ OSS_SEL ”Go