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ZHCSB29I September 2009 – October 2019 DS90UR905Q-Q1 , DS90UR906Q-Q1

PRODUCTION DATA.

封裝選項

機械數據 (封裝 | 引腳)

RHS|48
- MPQF159B

散熱焊盤機械數據 (封裝 | 引腳)

RHS|48
- QFND509A

訂購信息

7.5 Serializer DC Electrical Characteristics

over recommended operating supply and temperature ranges unless otherwise specified.⁽¹⁾⁽²⁾⁽³⁾

PARAMETER		TEST CONDITIONS		PIN / FREQ	MIN	TYP	MAX	UNIT
LVCMOS INPUT DC SPECIFICATIONS
V_IH	High-level input voltage	V_DDIO = 3.0 to 3.6 V		R[7:0], G[7:0], B[7:0], HS, VS, DE, PCLK, PDB, VODSEL, RFB, CONFIG[1:0],BISTEN	2.2		V_DDIO	V
V_IH	High-level input voltage	V_DDIO = 1.71 to 1.89 V			0.65 × V_DDIO		V_DDIO	V
V_IL	Low-level input voltage	V_DDIO = 3.0 to 3.6 V			GND		0.8	V
V_IL	Low-level input voltage	V_DDIO = 1.71 to 1.89 V			GND		0.35 × V_DDIO	V
I_IN	Input current	V_IN = 0 V or V_DDIO	V_DDIO = 3.0 to 3.6 V		–15	±1	+15	μA
I_IN	Input current	V_IN = 0 V or V_DDIO	V_DDIO = 1.7 to 1.89 V		–15	±1	+15	μA
LVDS DRIVER DC SPECIFICATIONS
V_OD	Differential output voltage	R_L = 100 Ω, De-emph = disabled, Figure 2	VODSEL = 0	DOUT+, DOUT–	±205	±280	±355	mV
V_OD	Differential output voltage		VODSEL = 1	DOUT+, DOUT–	±320	±420	±520	mV
V_ODp-p	Differential output voltage (DOUT+) – (DOUT-)		VODSEL = 0	DOUT+, DOUT–		560		mVp-p
V_ODp-p	Differential output voltage (DOUT+) – (DOUT-)		VODSEL = 1	DOUT+, DOUT–		840		mVp-p
ΔV_OD	Output voltage unbalance	R_L = 100 Ω, De-emph = disabled, VODSEL = L		DOUT+, DOUT–		1	50	mV
V_OS	Offset voltage – single-ended at TP A and B, Figure 1	R_L = 100 Ω, De-emph = disabled	VODSEL = 0			1.65		V
V_OS	Offset voltage – single-ended at TP A and B, Figure 1	R_L = 100 Ω, De-emph = disabled	VODSEL = 1			1.575		V
ΔV_OS	Offset voltage unbalance Single-ended at TP A and B, Figure 1	R_L = 100 Ω, De-emph = disabled		DOUT+, DOUT–		1		mV
I_OS	Output short circuit current	DOUT± = 0 V, De-emph = disabled	VODSEL = 0			–36		mA
R_T	Internal termination resistor				80	100	120	Ω
SUPPLY CURRENT
I_DDT1	Serializer supply current (includes load current) R_L = 100 Ω, f = 65 MHz	Checker Board Pattern, De-emph = 3 KΩ VODSEL = H, Figure 9	V_DD = 1.89 V	All V_DD pins		75	85	mA
I_DDT1			V_DDIO = 1.89 V	V_DDIO		3	5
I_DDIOT1			V_DDIO = 3.6 V	V_DDIO		11	15
I_DDT2		Checker Board Pattern, De-emph = 6 KΩ, VODSEL = L, Figure 9	V_DD = 1.89 V	All V_DD pins		65	75	mA
I_DDT2			V_DDIO = 1.89 V	V_DDIO		3	5
I_DDIOT2			V_DDIO = 3.6 V	V_DDIO		11	15
I_DDZ	Serializer cupply current power down	PDB = 0 V , (All other LVCMOS Inputs = 0 V)	V_DD = 1.89 V	All V_DD pins		40	1000	μA
I_DDZ			V_DDIO = 1.89 V	V_DDIO		5	10
I_DDIOZ			V_DDIO = 3.6 V	V_DDIO		10	20

(1) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured.

(2) Typical values represent most likely parametric norms at V_DD = 3.3 V, T_A = 25°C, and at the Recommended Operating Conditions at the time of product characterization and are not ensured.

(3) Current into device pins is defined as positive. Current out of a device pin is defined as negative. Voltages are referenced to ground except VOD, ΔVOD, VTH and VTL which are differential voltages.