ZHCSHX0C March 2018 – January 2023 DS90UB936-Q1
PRODUCTION DATA
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| GPIOX_OUTPUT_SEL[2:0] | GPIOX_OUT_SRC[2:0] | GPIOX_OUT_VAL | GPIOX_OUT_EN | ||||
| GPIO OUTPUT FUNCTION | GPIOX OUTPUT SOURCE SELECT GPIOX_OUT_SRC[2:0] | GPIOX OUTPUT FUNCTION SELECT GPIOX_OUTPUT_SEL[2:0] | GPIOX OUTPUT VALUE (GPIOX_OUT_VAL) | GPIO OUTPUT ENABLE (GPIOX_OUT EN) | |
|---|---|---|---|---|---|
| VALUE | OUTPUT SIGNAL SOURCE | ||||
| GPIOX output disabled | X | No output. GPIO is Disabled or set to input mode | X | X | 0 |
| GPIOX linked to Forward channel received GPIO0 from RX Port 0 Serializer | 000 | RX Port 0 | 000 | X | 1 |
| GPIOX linked to Forward channel received GPIO1 from RX Port 0 Serializer | 001 | X | 1 | ||
| GPIOX linked to Forward channel received GPIO2 from RX Port 0 Serializer | 010 | X | 1 | ||
| GPIOX linked to Forward channel received GPIO3 from RX Port 0 Serializer | 011 | X | 1 | ||
| RX Port 0 Lock indication | 100 | X | 1 | ||
| RX Port 0 Pass indication | 101 | X | 1 | ||
| RX Port 0 Frame Valid signal | 110 | X | 1 | ||
| RX Port 0 Line Valid signal | 111 | X | 1 | ||
| GPIOX linked to Forward channel received GPIO0 from RX Port 1 Serializer | 001 | RX Port 1 | 000 | X | 1 |
| GPIOX linked to Forward channel received GPIO1 from RX Port 1 Serializer | 001 | X | 1 | ||
| GPIOX linked to Forward channel received GPIO2 from RX Port 1 Serializer | 010 | X | 1 | ||
| GPIOX linked to Forward channel received GPIO3 from RX Port 1 Serializer | 011 | X | 1 | ||
| RX Port 1 Lock indication | 100 | X | 1 | ||
| RX Port 1 Pass indication | 101 | X | 1 | ||
| RX Port 1 Frame Valid signal | 110 | X | 1 | ||
| RX Port 1 Line Valid signal | 111 | X | 1 | ||
| Reserved | 010 | Reserved | X | X | X |
| Set GPI0X = LOW value programmed by register | 100 | Device Status | 000 | 0 | 1 |
| Set GPIOX = HIGH value programmed by register | 000 | 1 | 1 | ||
| Logical OR of Lock indication from enabled RX ports | 001 | X | 1 | ||
| Logical AND of Lock indication from enabled RX ports | 010 | X | 1 | ||
| Logical AND of Pass indication from enabled RX ports | 011 | X | 1 | ||
| FrameSync signal (internal or external) | 100 | X | 1 | ||
| Device interrupt active high | 101 | X | 1 | ||
| Device interrupt active low | 110 | X | 1 | ||
| Reserved | 100 | Reserved | 111 | X | X |
| Pass (AND of selected RX port status) | 101 | CSI-2 Tx Port | 000 | X | 1 |
| Pass (OR of selected RX port status) | 001 | X | 1 | ||
| Frame Valid signal corresponding to video frame recovered at deserializer (Note) Insert cross reference | 010 | X | 1 | ||
| Line Valid signal corresponding to video frame recovered at deserializer (Note) Insert cross reference | 011 | X | 1 | ||
| RX Ports synchronized, RX Port 0 synchronized with RX Port 1 | 100 | X | 1 | ||
| :CSI-2 TX Port Interrupt active high | 101 | X | 1 | ||
| Reserved | 101 | Reserved | 110 | X | X |
| Reserved | 101 | Reserved | 111 | X | X |
| Reserved | 110 | Reserved | X | X | X |
| Reserved | 111 | Reserved | X | X | X |