ZHCSHX0C March 2018 – January 2023 DS90UB936-Q1
PRODUCTION DATA
One method to enable BIST is by driving a logic high level on the BISTEN pin. During pin control BIST, the values on GPIO1 and GPIO0 pins will control whether the Serializer uses an external or internal clock for the BIST pattern. The values on GPIO1 and GPIO0 will be written to the Serializer register 0x14[2:1]. A value of 00 will select an external clock. A non-zero value will enable an internal clock of the frequency defined in the Serializer register 0x14. Note that when the DS90UB936-Q1 is paired with DS90UB933-Q1 or DS90UB913A-Q1, a setting of 11 may result in a frequency that is too slow for the DS90UB936-Q1 to recover. The GPIO1 and GPIO0 values are sampled at the start of BIST (when BISTEN pin transitions to high). Changing this value after BIST is enabled will not change operation. Link BIST can also be enabled by register control through the BIST Control register (address 0xB3)