ZHCSHX0C March 2018 – January 2023 DS90UB936-Q1
PRODUCTION DATA
The DS90UB936-Q1 FPD-Link III Deserializer, in conjunction with an ADAS FPD-Link III serializer supports the video transport needs with an ultra-high speed forward channel and an embedded bidirectional control channel. The DS90UB936-Q1 received data is output from a configurable MIPI CSI-2 port. The CSI-2 port may be configured as either a single CSI-2 output with four lanes up to 1.662 Gbps per lane or as two 2 lane CSI-2 outputs for sending replicated data on both ports. A second differential clock is available for the second replicated output when configured for dual CSI-2 outputs supporting one clock lane and one or two data lanes each. The DS90UB936-Q1 can support multiple data formats and different resolutions as provided by the sensor. Conversion between different data formats is not supported. The CSI-2 Tx module accommodates both image data and non-image data (including synchronization or embedded data packets).
The DS90UB936-Q1 CSI-2 interface combines each of the sensor data streams into packets designated for each virtual channel. The output generated is composed of virtual channels to separate different streams to be interleaved. Each virtual channel is identified by a unique channel identification number in the packet header.
When the DS90UB936-Q1 is paired with a DS90UB935-Q1 serializer, the received FPD-Link III forward channel is constructed in 40-bit long frames. Each encoded frame contains video payload data, I2C forward channel data, and additional information on framing, data integrity and link diagnostics. The high-speed, serial bit stream from the DS90UB935-Q1 contains an embedded clock and DC-balancing ensuring sufficient data line transitions for enhanced signal quality. When paired with ADAS serializers in RAW input mode, the received FPD-Link III forward channel is similarly constructed at a lower line rate in 28-bit long frames. The DS90UB936-Q1 device recovers a high-speed, FPD-Link III forward channel signal and generates a bidirectional control channel control signal in the reverse channel direction. The DS90UB936-Q1 converts the FPD-Link III stream into a MIPI CSI-2 output interface designed to support automotive sensors, including image sensors supplying up to 2.5-Gbps CSI-2 data.
The DS90UB936-Q1 device has two receive input ports to accept up to two sensor streams simultaneously. The control channel function of the DS90UB93x-Q1 chipset provides bidirectional communication between the image sensors and ECU. The integrated bidirectional control channel transfers data bidirectionally over the same differential pair used for video data interface. This interface offers advantages over other chipsets by eliminating the need for additional wires for programming and control. The bidirectional control channel bus is controlled through an I2C port. The bidirectional control channel offers continuous low latency communication and is not dependent on video blanking intervals. The DS90UB935-Q1/936-Q1 chipset can operate entirely off of the back channel frequency clock generated by the DS90UB936-Q1 and recovered by the DS90UB935-Q1. The DS90UB935-Q1 provides the reference clock source for the sensor based on the recovered back channel clock. Synchronous clocking mode provides distinct advantages in a multi-sensor system by locking all of the sensors and the receiver to a common reference in the same clock domain, which reduces or eliminates the need for data buffering and re-synchronization. This mode also eliminates the cost, space, and potential failure point of a reference oscillator within the sensor. The DS90UB93x-Q1 chipset offer customers the choice to work with different clocking schemes. The DS90UB93x-Q1 chipset can also use an external oscillator as the reference clock source for the PLL as the primary reference clock to the serializer (see the DS90UB935-Q1 data sheet).