ZHCSF68D May 2015 – July 2019 DRV8305-Q1
PRODUCTION DATA.
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| POWER SUPPLIES (PVDD, DVDD, AVDD) | ||||||
| VPVDD | PVDD operating voltage | 4.4 | 45 | V | ||
| Voltage regulator (VREG) operational | 4.3 | 45 | V | |||
| IPVDD_Operating | PVDD operating supply current | EN_GATE = HIGH; VREG no load; outputs HI-Z | 20 | mA | ||
| IPVDD_Standby | PVDD standby supply current | EN_GATE = LOW; VREG no load | 5 | mA | ||
| IPVDD_Sleep | PVDD sleep supply current | EN_GATE = LOW; Sleep Mode;
TJ = –40 to 150 °C |
60 | 200 | μA | |
| EN_GATE = LOW; Sleep Mode;
TJ = 150 to 175 °C |
250 | uA | ||||
| VAVDD | Internal regulator voltage | PVDD = 5.3 to 45 V | 4.85 | 5 | 5.15 | V |
| PVDD = 4.4 to 5.3 V | PVDD – 0.4 | PVDD | V | |||
| VDVDD | Internal regulator voltage | 3.3 | V | |||
| VOLTAGE REGULATOR (3.3-V or 5-V VREG) | ||||||
| VVREG | VREG DC output voltage | PVDD = 5.4 to 45 V | VREG × 0.97 | VREG | VREG × 1.03 | V |
| PVDD = 4.4 to 5.3 V; 5-V VREG | PVDD – 0.4 | PVDD | V | |||
| PVDD = 4.4 to 5.3 V; 3.3-V VREG | VREG × 0.97 | VREG | VREG × 1.03 | V | ||
| VLineReg | Line regulation | 5.3 V ≤ VIN ≤ 12 V; IO = 1 mA | 20 | mV | ||
| VLoadReg | Load regulation | 100 μA ≤ IOUT ≤ 50 mA; 5-V VREG | 50 | 150 | mV | |
| 100 μA ≤ IOUT ≤ 50 mA; 3.3-V VREG | 30 | 100 | mV | |||
| LOGIC-LEVEL INPUTS (INHx, INLx, EN_GATE, SCLK, nSCS) | ||||||
| VIL | Input logic low voltage | 0 | 0.8 | V | ||
| VIH | Input logic high voltage | 2 | 5 | V | ||
| RPD | Internal pulldown resistor | To GND | 100 | kΩ | ||
| CONTROL OUTPUTS (nFAULT, SDO, PWRGD) | ||||||
| VOL | Output logic low voltage | nFAULT; SDO; PWRGD; IO = 5 mA | 0.5 | V | ||
| VOH | Output logic high voltage | SDO; IO = 5 mA | VREG – 0.9 | V | ||
| IOH | Output logic high leakage | VO = 3.3 V | –1 | 1 | μA | |
| HIGH VOLTAGE TOLERANT LOGIC INPUT (WAKE) | ||||||
| VIL_WAKE | Output logic low voltage | 1.1 | 1.45 | V | ||
| VIH_WAKE | Output logic high voltage | 1.46 | 1.8 | V | ||
| GATE DRIVE OUTPUT (GHx, GLx) | ||||||
| VGHS | High-side gate driver Vgs voltage | VPVDD = 8 to 45 V; IGATE < 30 mA | 9 | 10 | 10.7 | V |
| VPVDD = 5.5 to 8 V; IGATE < 10 mA | 7 | 10.7 | V | |||
| VPVDD = 4.4 to 5.5 V; IGATE < 5 mA | 5 | 9 | V | |||
| VGLS | Low-side gate driver Vgs voltage | VPVDD = 8 to 45 V; IGATE < 30 mA | 9 | 10 | 10.7 | V |
| VPVDD = 5.5 to 8 V; IGATE < 10 mA | 9 | 10.7 | V | |||
| VPVDD = 4.4 to 5.5 V; IGATE < 5 mA | 8 | 10.7 | V | |||
| PEAK CURRENT DRIVE TIMES (GHx, GLx) | ||||||
| tDRIVE | Peak sink or source current drive time | TDRIVEP = 00; TDRIVEN = 00 | 220 | ns | ||
| TDRIVEP = 01; TDRIVEN = 01 | 440 | ns | ||||
| TDRIVEP = 10; TDRIVEN = 10 | 880 | ns | ||||
| TDRIVEP = 11; TDRIVEN = 11 | 1780 | ns | ||||
| HIGH-SIDE PEAK CURRENT GATE DRIVE (GHx) | ||||||
| IDRIVEP_HS | High-side peak source current | IDRIVEP_HS = 0000 | 0.01 | A | ||
| IDRIVEP_HS = 0001 | 0.02 | A | ||||
| IDRIVEP_HS = 0010 | 0.03 | A | ||||
| IDRIVEP_HS = 0011 | 0.04 | A | ||||
| IDRIVEP_HS = 0100 | 0.05 | A | ||||
| IDRIVEP_HS = 0101 | 0.06 | A | ||||
| IDRIVEP_HS = 0110 | 0.07 | A | ||||
| IDRIVEP_HS = 0111 | 0.125 | A | ||||
| IDRIVEP_HS = 1000 | 0.25 | A | ||||
| IDRIVEP_HS = 1001 | 0.5 | A | ||||
| IDRIVEP_HS = 1010 | 0.75 | A | ||||
| IDRIVEP_HS = 1011 | 1 | A | ||||
| IDRIVEP_HS = 1100, 1101, 1110, 1111 | 0.05 | A | ||||
| IDRIVEN_HS | High-side peak sink current | IDRIVEN_HS = 0000 | 0.02 | A | ||
| IDRIVEN_HS = 0001 | 0.03 | A | ||||
| IDRIVEN_HS = 0010 | 0.04 | A | ||||
| IDRIVEN_HS = 0011 | 0.05 | A | ||||
| IDRIVEN_HS = 0100 | 0.06 | A | ||||
| IDRIVEN_HS = 0101 | 0.07 | A | ||||
| IDRIVEN_HS = 0110 | 0.08 | A | ||||
| IDRIVEN_HS = 0111 | 0.25 | A | ||||
| IDRIVEN_HS = 1000 | 0.5 | A | ||||
| IDRIVEN_HS = 1001 | 0.75 | A | ||||
| IDRIVEN_HS = 1010 | 1 | A | ||||
| IDRIVEN_HS = 1011 | 1.25 | A | ||||
| IDRIVEN_HS = 1100, 1101, 1110, 1111 | 0.06 | A | ||||
| LOW-SIDE PEAK CURRENT GATE DRIVE (GLx) | ||||||
| IDRIVEP_LS | Low-side peak source current | IDRIVEP_LS = 0000 | 0.01 | A | ||
| IDRIVEP_LS = 0001 | 0.02 | A | ||||
| IDRIVEP_LS = 0010 | 0.03 | A | ||||
| IDRIVEP_LS = 0011 | 0.04 | A | ||||
| IDRIVEP_LS = 0100 | 0.05 | A | ||||
| IDRIVEP_LS = 0101 | 0.06 | A | ||||
| IDRIVEP_LS = 0110 | 0.07 | A | ||||
| IDRIVEP_LS = 0111 | 0.125 | A | ||||
| IDRIVEP_LS = 1000 | 0.25 | A | ||||
| IDRIVEP_LS = 1001 | 0.5 | A | ||||
| IDRIVEP_LS = 1010 | 0.75 | A | ||||
| IDRIVEP_LS = 1011 | 1 | A | ||||
| IDRIVEP_LS = 1100, 1101, 1110, 1111 | 0.05 | A | ||||
| IDRIVEN_LS | Low-side peak sink current | IDRIVEN_LS = 0000 | 0.02 | A | ||
| IDRIVEN_LS = 0001 | 0.03 | A | ||||
| IDRIVEN_LS = 0010 | 0.04 | A | ||||
| IDRIVEN_LS = 0011 | 0.05 | A | ||||
| IDRIVEN_LS = 0100 | 0.06 | A | ||||
| IDRIVEN_LS = 0101 | 0.07 | A | ||||
| IDRIVEN_LS = 0110 | 0.08 | A | ||||
| IDRIVEN_LS = 0111 | 0.25 | A | ||||
| IDRIVEN_LS = 1000 | 0.5 | A | ||||
| IDRIVEN_LS = 1001 | 0.75 | A | ||||
| IDRIVEN_LS = 1010 | 1 | A | ||||
| IDRIVEN_LS = 1011 | 1.25 | A | ||||
| IDRIVEN_LS = 1100, 1101, 1110, 1111 | 0.06 | A | ||||
| PASSIVE GATE PULLDOWN (GHx, GLx) | ||||||
| RSLEEP_PD | Gate pulldown resistance, sleep mode | EN_GATE = LOW; GHx to GND; | 1000 | Ω | ||
| EN_GATE = LOW; GLx to GND; | 500 | Ω | ||||
| RSTANDBY_PD | Gate pulldown resistance, standby mode | EN_GATE = LOW; GHx to GND; | 1000 | Ω | ||
| EN_GATE = LOW; GLx to GND; | 500 | Ω | ||||
| ACTIVE GATE PULLDOWN (GHx, GLx) | ||||||
| IHOLD | Gate pulldown current, holding | EN_GATE = HIGH;
GHx to SHx; GLx to SLx |
50 | mA | ||
| ISTRONG | Gate pulldown current, strong | EN_GATE = HIGH;
GHx to SHx; GLx to SLx |
1.25 | A | ||
| GATE TIMING | ||||||
| tpd_lf-O | Positive input falling to GHS_x falling | PVDD = 12 V; CL = 1 nF; 50% to 50% | 200 | ns | ||
| tpd_lr-O | Positive input rising to GHS_x rising | PVDD = 12 V; CL = 1 nF; 50% to 50% | 200 | ns | ||
| td_min | Minimum dead time after hand shaking | 280 | ns | |||
| tdtp | Dead time in addition to td_min | DEAD_TIME = 000 | 35 | ns | ||
| DEAD_TIME = 001 | 52 | ns | ||||
| DEAD_TIME = 010 | 88 | ns | ||||
| DEAD_TIME = 011 | 440 | ns | ||||
| DEAD_TIME = 100 | 880 | ns | ||||
| DEAD_TIME = 101 | 1760 | ns | ||||
| DEAD_TIME = 110 | 3520 | ns | ||||
| DEAD_TIME = 111 | 5280 | ns | ||||
| tPD_MATCH | Propagation delay matching between high-side and low-side | 50 | ns | |||
| tDT_MATCH | Dead-time matching | 50 | ns | |||
| CURRENT SHUNT AMPLIFIER | ||||||
| GCSA | Current sense amplifier gain | GAIN_CSx = 00 | 10 | V/V | ||
| GAIN_CSx = 01 | 19.9 | V/V | ||||
| GAIN_CSx = 10 | 39.8 | V/V | ||||
| GAIN_CSx = 11 | 78.8 | V/V | ||||
| GERR | Current sense amplifier gain error | Input differential > 0.025 V;
TJ = –40 to 150 °C |
–3.5 | 3.5 | % | |
| Input differential > 0.025 V;
TJ = 150 to 175 °C |
–4 | 4 | % | |||
| tSETTLING | Current sense amplifier settling time | Settling time to 1%; no blanking;
GCSA = 10; Vstep = 0.46 V |
300 | ns | ||
| Settling time to 1%; no blanking;
GCSA = 20; Vstep = 0.46 V |
600 | ns | ||||
| Settling time to 1%; no blanking;
GCSA = 40; Vstep = 0.46 V |
1.2 | µs | ||||
| Settling time to 1%; no blanking;
GCSA = 80; Vstep = 0.46 V |
2.4 | µs | ||||
| VIOS | DC input offset | GCSA = 10; input shorted; RTI | –4 | 4 | mV | |
| VVREF_ERR | Reference buffer error (DC) | Internal or external VREF;
VREF_SCALE = 01 |
–3 | 3 | % | |
| Internal or external VREF;
VREF_SCALE = 10 |
–4 | 4 | % | |||
| Internal or external VREF;
VREF_SCALE = 11 |
–10 | 10 | % | |||
| VDRIFTOS | Input offset error drift | GCSA = 10; input shorted; RTI | 10 | µV/C | ||
| IBIAS | Input bias current | VIN_COM = 0; SOx open | 100 | µA | ||
| IOFFSET | Input bias current offset | IBIAS (SNx-SPx); VIN_COM = 0;
SOx open |
1 | µA | ||
| VIN_COM | Common input mode range | –0.15 | 0.15 | V | ||
| VIN_DIFF | Differential input range | –0.48 | 0.48 | V | ||
| CMRR | Common mode rejection ration | External input resistance matched;
DC; GCSA = 10 |
60 | 80 | dB | |
| External input resistance matched;
20 kHz; GCSA = 10 |
60 | 80 | dB | |||
| PSRR | Power supply rejection ratio | DC (<120 Hz); GCSA = 10 | 150 | dB | ||
| 20 kHz; GCSA = 10 | 90 | dB | ||||
| VSWING | Output voltage swing | PVDD > 5.3 V | 0.3 | 4.7 | V | |
| VSLEW | Output slew rate | GCSA = 10; RL = 0 Ω; CL = 60 pF | 5.2 | 10 | V/µs | |
| IVO | Output short circuit current | SOx shorted to ground | 20 | mA | ||
| UGB | Unity gain bandwidth product | GCSA = 10 | 2 | MHz | ||
| VOLTAGE PROTECTION | ||||||
| VAVDD_UVLO | AVDD undervoltage fault | AVDD falling, relative to GND | 3.3 | 3.7 | V | |
| VVREG_UV | VREG undervoltage fault | VREG_UV_LEVEL = 00 | VREG × 0.9 | V | ||
| VREG_UV_LEVEL = 01 | VREG × 0.8 | V | ||||
| VREG_UV_LEVEL = 10 | VREG × 0.7 | V | ||||
| VREG_UV_LEVEL = 11 | VREG × 0.7 | V | ||||
| VVREG_UV_DGL | VREG undervoltage monitor deglitch time | 1.5 | 2 | µs | ||
| VPVDD_UVFL | Undervoltage protection warning, PVDD | PVDD falling | 7.7 | 8.1 | V | |
| PVDD rising | 7.9 | 8.3 | V | |||
| VPVDD_UVLO1 | Undervoltage protection lock out, PVDD | PVDD falling | 4.1 | V | ||
| PVDD rising | 4.3 | V | ||||
| VPVDD_UVLO2 | Undervoltage protection fault, PVDD | PVDD falling | 4.2 | 4.4 | V | |
| PVDD rising | 4.4 | 4.7 | V | |||
| VPVDD_OVFL | Overvoltage protection warning, PVDD | PVDD falling | 33.5 | 36 | V | |
| PVDD rising | 32.5 | 35 | V | |||
| VVCPH_UVFL | Charge pump undervoltage protection warning, VCPH | VCPH falling, relative to PVDD | 8 | V | ||
| VVCPH_UVLO2 | Charge pump undervoltage protection fault, VCPH | VCPH falling, relative to PVDD, SET_VCPH_UV = 0 | 4.6 | 5.3 | V | |
| VCPH falling, relative to PVDD, SET_VCPH_UV = 1 | 4.3 | 5 | V | |||
| VVCP_LSD_UVLO2 | Low-side regulator undervoltage fault, VCP_LSD | VCP_LSD falling, relative to GND | 6.4 | 7.5 | V | |
| VVCPH_OVLO | Charge pump overvoltage protection fault, VCPH | Relative to PVDD | 14 | 18 | V | |
| VVCPH_OVLO_ABS | Charge pump overvoltage protection fault, VCPH | Relative to GND | 60 | V | ||
| TEMPERATURE PROTECTION | ||||||
| OTW_CLR | Junction temperature-to clear overtemperature (OTW) warning(2) | 100 | 130 | 150 | °C | |
| OTW_SET | Junction temperature for overtemperature (OTW) warning(2) | 135 | 160 | 185 | °C | |
| OTSD_CLR | Junction temperature-to-clear overtemperature shutdown (OTSD)(2) | 125 | 155 | 180 | °C | |
| OTSD_SET(1) | Junction temperature for overtemperature shutdown (OTSD)(2) | 160 | 185 | 210 | °C | |
| TEMP_FLAG1 | Junction temperature flag setting 1(2) | 105 | °C | |||
| TEMP_FLAG2 | Junction temperature flag setting 2(2) | 125 | °C | |||
| TEMP_FLAG3 | Junction temperature flag setting 3(2) | 135 | °C | |||
| TEMP_FLAG4 | Junction temperature flag setting 4(2) | 185 | °C | |||
| PROTECTION CONTROL | ||||||
| tpd,E-L | Delay, error event to all gates low | TBLANK = 00; TVDS = 00 | 1 | µs | ||
| tpd,E-SD | Delay, error event to nFAULTx low | TBLANK = 00; TVDS = 00 | 1 | µs | ||
| FET CURRENT PROTECTION (VDS SENSING) | ||||||
| VDS_TRIP | Drain-source voltage protection limit | VDS_LEVEL = 00000 | 0.06 | V | ||
| VDS_LEVEL = 00001 | 0.068 | V | ||||
| VDS_LEVEL = 00010 | 0.076 | V | ||||
| VDS_LEVEL = 00011 | 0.086 | V | ||||
| VDS_LEVEL = 00100 | 0.097 | V | ||||
| VDS_LEVEL = 00101 | 0.109 | V | ||||
| VDS_LEVEL = 00110 | 0.123 | V | ||||
| VDS_LEVEL = 00111 | 0.138 | V | ||||
| VDS_LEVEL = 01000 | 0.155 | V | ||||
| VDS_LEVEL = 01001 | 0.175 | V | ||||
| VDS_LEVEL = 01010 | 0.197 | V | ||||
| VDS_LEVEL = 01011 | 0.222 | V | ||||
| VDS_LEVEL = 01100 | 0.25 | V | ||||
| VDS_LEVEL = 01101 | 0.282 | V | ||||
| VDS_LEVEL = 01110 | 0.317 | V | ||||
| VDS_LEVEL = 01111 | 0.358 | V | ||||
| VDS_LEVEL = 10000 | 0.403 | V | ||||
| VDS_LEVEL = 10001 | 0.454 | V | ||||
| VDS_LEVEL = 10010 | 0.511 | V | ||||
| VDS_LEVEL = 10011 | 0.576 | V | ||||
| VDS_LEVEL = 10100 | 0.648 | V | ||||
| VDS_LEVEL = 10101 | 0.73 | V | ||||
| VDS_LEVEL = 10110 | 0.822 | V | ||||
| VDS_LEVEL = 10111 | 0.926 | V | ||||
| VDS_LEVEL = 11000 | 1.043 | V | ||||
| VDS_LEVEL = 11001 | 1.175 | V | ||||
| VDS_LEVEL = 11010 | 1.324 | V | ||||
| VDS_LEVEL = 11011 | 1.491 | V | ||||
| VDS_LEVEL = 11100 | 1.679 | V | ||||
| VDS_LEVEL = 11101 | 1.892 | V | ||||
| VDS_LEVEL = 11110 | 2.131 | V | ||||
| VDS_LEVEL = 11111 | 2.131 | V | ||||
| tVDS | VDS sense deglitch time | TVDS = 00 | 0 | µs | ||
| TVDS = 01 | 1.75 | µs | ||||
| TVDS = 10 | 3.5 | µs | ||||
| TVDS = 11 | 7 | µs | ||||
| tBLANK | VDS sense blanking time | TBLANK = 00 | 0 | µs | ||
| TBLANK = 01 | 1.75 | µs | ||||
| TBLANK = 10 | 3.5 | µs | ||||
| TBLANK = 11 | 7 | µs | ||||
| tWARN_PULSE | nFAULT pin warning pulse length | 56 | µs | |||
| PHASE SHORT PROTECTION | ||||||
| VSNSOCP_TRIP | Phase short protection limit | Fixed voltage | 2 | V | ||