SLVSGC3 May 2020 DRV8210P
PRODUCTION DATA
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Device Comparison
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
9.2.2.2.2 Control Interface
The PWM interface can be used to drive dual-coil relays. Section 8.3.2.1 describes the PWM control interface. Figure 9-8 and Figure 9-9 show a schematic and timing diagram for driving a dual-coil relay with the PWM interface.
Figure 9-8 Schematic of dual-coil relay driven by the OUTx H-bridge
Figure 9-9 Timing diagram for driving a dual-coil relay with PWM interfaceTable 9-3 shows the logic table for the PWM interface. The descriptions in this table reflect how the input and output states drive the dual coil relay. When Coil1 is driven (OUT1 voltage is at GND), The voltage at OUT2 will go to VM. Because the center tap of the relay is also at VM, no current flows through Coil2. The same is true when Coil2 is driven; Coil1 shorts to VM. The body diodes of the high-side FETs act as freewheeling diodes, so extra external diodes are not needed. Figure 9-10 shows oscilloscope traces for this application.
| IN1 | IN2 | OUT1 | OUT2 | DESCRIPTION |
|---|---|---|---|---|
| 0 | 0 | Hi-Z | Hi-Z | Outputs disabled (H-Bridge Hi-Z) |
| 0 | 1 | L | H | Drive Coil1 |
| 1 | 0 | H | L | Drive Coil2 |
| 1 | 1 | L | L | Drive Coil1 and Coil2 (invalid state for a dual-coil latching relay) |