The shunt-based protection triggers the enable pin of the gate driver. As soon as this enable pin goes low, the gate driver turns off the SiC MOSFET via the turn-off resistance R_G,OFF.

As the turn-off event is a hard turn-off, the drain-source voltage of the high-side SiC MOSFETs u_DS has an overshoot during the switching event that can damage the SiC MOSFET. Under normal operating conditions, that overshoot depends on the stray inductance L_σ,C, the slope of the SiC MOSFET current di_SC/dt and the commutation capacitance C_C [19] However, due to the large current present in the event of a short circuit, the overshoot in the drain-source voltage in the event of a fault also depends on the stray inductance L_σ,B, as the commutation capacitance C_C can no longer provide enough energy to limit the overshoot.

The influence of different commutation capacitors C_C during an SCT 1 with a DC-link voltage U_batt = 400V is shown in Figure 5-1. For these measurements, a turn-off gate resistance R_G,OFF = 80Ω is used. While different commutation capacitors C_C show only a minor effect on the current i_SC, the capacitance has an impact on the drain-source voltage of the high-side SiC MOSFETs u_DS. Using a capacitance C_C = 10 nF, the u_DS voltage reaches 1230V, which is a potential hazard for the 1200V SiC MOSFET.

Increasing the capacitance C_C to 20nF, the voltage peak is reduced to 840V. However, increasing that capacitance further to C_C = 300nF, no significant reduction in the voltage overshoot is observed. This can be explained by the fact, that a commutation capacitance C_C ≥ 200nF is sufficient to provide the energy stored in the inductance L_σ,C in case of a short-circuit current.

Figure 5-1 Influence of Different Commutation Capacitors C_C on Switching Transients During SCT 1

The choice of the value for the capacitance C_C is a trade-off between cost and performance. The voltage overshoot should not be overly constrained, because the SiC MOSFET is capable of dissipating a limited amount of energy during an avalanche event. In all other discussed measurements, the commutation capacitance is chosen to C_C = 100nF.

To verify a safe turn-off with a capacitance C_C = 100nF, the turn-off resistor R_G,off needs to be increased to decrease the voltage overshoot. Figure 5-2 shows measurement results for different turn-off gate resistances R_G,off with a DC-link voltage U_batt = 400V. The measured short-circuit current shows only slight changes in the short-circuit current i_SC, while the drain-source voltage u_DS differs significantly.

Using a resistance R_G,off = 8Ω, the voltage peak reaches 1230V. Increasing the resistance to R_G,off = 20Ω, the voltage overshoot is decreased to 1000V. With a resistance R_G,off = 35Ω, the drain-source voltage reaches only 860V as maximum.

Although a larger gate resistor can reduce the voltage overshoot, this increases the turn-off losses in normal operation. Therefore, the choice of the turn-off resistance is a trade-off between losses and overshoot.

Figure 5-2 Influence of Different Turn-Off Resistors R_G,off on Switching Transients During SCT 1

Figure 5-3 shows the waveforms of an SCT 1 with a DC-link voltage U_batt = 800V and a turn-off gate resistor R_G,off = 35Ω. At time 0ns, the gate-source voltage u_GS reaches the threshold voltage of the MOSFET and the current i_SC starts to rise. The fault signal u_shunt starts to decrease significantly at time 200ns, indicating a fault. The gate-source voltage u_GS starts to decrease at time 380ns, starting to turn-off the SiC MOSFET . The drain-source voltage u_DS reaches its maximum of 1190V at 48ns.

Figure 5-3 Waveforms for Shunt-Based Method With R_G,off = 35Ω