ZHCSGE0B June 2017 – January 2019 TPS53681
PRODUCTION DATA.
The STATUS_WORD command returns two bytes of information with a summary of critical faults, such as over-voltage, overcurrent, over-temperature, etc..
The STATUS_WORD command must be accessed through Read Word transactions. STATUS_WORD is a paged register. In order to access STATUS_WORD command for channel A, PAGE must be set to 00h. In order to access STATUS_WORD register for channel B, PAGE must be set to 01h. If PAGE is set FFh, the device return value will reflect the status of Channel A.
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| R | R | R | R | R | R | R | R |
| VOUT | IOUT | INPUT | MFR | PGOOD | FANS | OTHER | UNKNOWN |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| R | R | R | R | R | R | R | R |
| BUSY | OFF | VOUT_OV | IOUT_OC | VIN_UV | TEMP | CML | OTHER |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 15 | VOUT | R | Current
Status |
Output Voltage Fault/Warning. Refer to STATUS_VOUT for more information.
0: Latched flag indicating no VOUT fault or warning has occurred. 1: Latched flag indicating a VOUT fault or warning has occurred. |
| 14 | IOUT | R | Current
Status |
Output Current Fault/Warning. Refer to STATUS_IOUT for more information.
0: Latched flag indicating no IOUT fault or warning has occurred. 1: Latched flag indicating an IOUT fault or warning has occurred. |
| 13 | INPUT | R | Current
Status |
Input Voltage/Current Fault/Warning. Refer to STATUS_INPUT for more information.
0: Latched flag indicating no VIN or IIN fault or warning has occurred. 1: Latched flag indicating a VIN or IIN fault or warning has occurred. |
| 12 | MFR | R | Current
Status |
MFR_SPECIFIC Fault. Refer to STATUS_MFR for more information.
0: Latched flag indicating no MFR_SPECIFIC fault has occurred. 1: Latched flag indicating a MFR_SPECIFIC fault has occurred. |
| 11 | PGOOD | R | Current
Status |
Power Good Status. Note: Per the PMBus specification, the PGOOD bit is not latched, always reflecting the current status of the AVR_RDY/BVR_RDY pin.
0: Raw status indicating AVR_RDY/BVR_RDY pin is at logic high. 1: Raw status indicating AVR_RDY/BVR_RDY pin is at logic low. |
| 10 | FANS | R | 0 | Not supported and always set to 0. |
| 9 | OTHER | R | 0 | Not supported and always set to 0. |
| 8 | UNKNOWN | R | 0 | Not supported and always set to 0. |
| 7 | BUSY | R | 0 | Not supported and always set to 0. |
| 6 | OFF | R | Current
Status |
This bit is asserted if the unit is not providing power to the output, regardless of the reason, including simply not being enabled.
0: Raw status indicating the IC is providing power to VOUT. 1: Raw status indicating the IC is not providing power to VOUT. |
| 5 | VOUT_OV | R | Current
Status |
Output Over-Voltage Fault Condition
0: Latched flag indicating no VOUT OV fault has occurred. 1: Latched flag indicating a VOUT OV fault occurred |
| 4 | IOUT_OC | R | Current
Status |
Output Over-Current Fault Condition
0: Latched flag indicating no IOUT OC fault has occurred. 1: Latched flag indicating an IOUT OC fault has occurred. |
| 3 | VIN_UV | R | Current
Status |
Input Under-Voltage Fault Condition
0: Latched flag indicating VIN is above the UVLO threshold. 1: Latched flag indicating VIN is below the UVLO threshold. |
| 2 | TEMP | R | Current
Status |
Over-Temperature Fault/Warning
0: Latched flag indicating no OT fault or warning has occurred. 1: Latched flag indicating an OT fault or warning has occurred. |
| 1 | CML | R | Current
Status |
Communications, Memory or Logic Fault
0: Latched flag indicating no communication, memory, or logic fault has occurred. 1: Latched flag indicating a communication, memory, or logic fault has occurred. |
| 0 | OTHER | R | Current
Status |
Other Fault (None of the Above)
This bit is used to flag faults not covered with the other bit faults. In this case, UVF or OCW faults are examples of other faults not covered by the bits [7:1] in this register. 0: No fault has occurred 1: A fault or warning not listed in bits [7:1] has occurred. |
Per the description in the PMBus 1.3 specification, part II, TPS53681 does support clearing of status bits by writing to STATUS registers. However, the bits in the STATUS_WORD are summary bits only and reflect the status of corresponding bits in STATUS_VOUT, STATUS_IOUT, etc... To clear these bits individually, the user must clear them by writing to the corresponding STATUS_X register. For example: the output overcurrent fault sets the IOUT_OC bit in STATUS_WORD, and the IOUT_OC_FLT bit in STATUS_IOUT. Writing a 1 to the IOUT_OC_FLT bit in STATUS_IOUT clears the fault in both STATUS_WORD and STATUS_IOUT. Writes to STATUS_WORD will be treated as invalid transactions.