ZHCSCR7A June 2014 – November 2020 TPS2559
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Detailed Description
-
9 Application and Implementation
- 9.1 Application Information
- 9.2
Typical Application
- 9.2.1 Design Requirements
- 9.2.2
Detailed Design Procedure
- 9.2.2.1 Step-by-Step Design Procedure
- 9.2.2.2 Input and Output Capacitance
- 9.2.2.3 Programming the Current-Limit Threshold
- 9.2.2.4 Design Above a Minimum Current Limit
- 9.2.2.5 Design Below a Maximum Current Limit
- 9.2.2.6 Accounting for Resistor Tolerance
- 9.2.2.7 Power Dissipation and Junction Temperature
- 9.2.2.8 Auto-Retry
- 9.2.2.9 Two-Level Current-Limit
- 9.2.3 Application Curves
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
9.2.2.9 Two-Level Current-Limit
Some applications require different current-limit thresholds depending on external system conditions. Figure 9-5 shows an implementation for an externally-controlled, two-level current-limit circuit. The current-limit threshold is set by the total resistance from ILIM to GND (see the Section 9.2.2.3 section). A logic-level input enables/disables MOSFET Q1 and changes the current-limit threshold by modifying the total resistance from ILIM to GND (see Figure 9-14 and Figure 9-15). Additional MOSFET/resistor combinations can be used in parallel to Q1/R2 to increase the number of additional current-limit levels.
ILIM must never be driven directly with an external signal.
Figure 9-5 Two-Level
Current-Limit Circuit