ZHCSP56 September 2023 TPS1HTC30-Q1
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| SNS TIMING - CURRENT SENSE | ||||||
| tSNSION1 | Settling time from rising edge of DIAG_EN 50% of VDIA_EN to 90% of settled ISNS |
VEN= 5 V, VDIAG_EN = 0 V to 5 V RSNS = 1 kΩ, IL = 1A |
30 | μs | ||
| tSNSION1 | Settling time from rising edge of DIAG_EN 50% of VDIA_EN to 90% of settled ISNS |
VEN = 5 V, VDIAG_EN = 0 V to 5 V RSNS = 1 kΩ, IL = 30 mA |
60 | μs | ||
| tSNSION2 | Settling time from rising edge of EN and DIAG_EN 50% of VDIA_EN VEN to 90% of settled ISNS |
VEN = VDIAG_EN = 0 V to 5 V RSNS = 1 kΩ, IL = 1 A |
200 | μs | ||
| tSNSION3 | Settling time from rising edge of EN with DIAG_EN HI; 50% of VDIA_EN VEN to 90% of settled ISNS |
VEN = 0 V to 5 V, VDIAG_EN = 5 V RSNS = 1 kΩ, IL = 1 A |
200 | μs | ||
| tSNSIOFF | Settling time from falling edge of DIAG_EN | VEN = 5 V, VDIAG_EN = 5 V to 0 V RSNS = 1 kΩ, RL = 125 Ω |
20 | μs | ||
| tSETTLEH | Settling time from rising edge of load step | VEN = 5 V, VDIAG_EN = 5 V RSNS = 1 kΩ, IOUT = 0.5 A to 3 A |
20 | μs | ||
| tSETTLEL | Settling time from falling edge of load step | VEN = 5 V, VDIAG_EN = 5 V RSNS = 1 kΩ, IOUT = 3 A to 0.5 A |
20 | μs | ||