ZHCSSV5 January 2024 TMP119
PRODUCTION DATA
| ADDRESS | TYPE | RESET | ACRONYM | REGISTER NAME | SECTION |
|---|---|---|---|---|---|
| 00h | R | 8000h | Temp_Result | Temperature result register | Go |
| 01h | R/W | 0220h(1) | Configuration | Configuration register | Go |
| 02h | R/W | 6000h(1) | THigh_Limit | Temperature high limit register | Go |
| 03h | R/W | 8000h(1) | TLow_Limit | Temperature low limit register | Go |
| 04h | R/W | 0000h | EEPROM_UL | EEPROM unlock register | Go |
| 05h | R/W | xxxxh(1) | EEPROM1 | EEPROM1 register | Go |
| 06h | R/W | xxxxh(1) | EEPROM2 | EEPROM2 register | Go |
| 07h | R/W | 0000h(1) | Temp_Offset | Temperature offset register | Go |
| 08h | R/W | xxxxh(1) | EEPROM3 | EEPROM3 register | Go |
| 0Fh | R | 0117h | Device_ID | Device ID register | Go |
| Access Type | Code | Description |
|---|---|---|
| Read Type | ||
| R | R | Read |
| RC | R C | Read to Clear |
| Write Type | ||
| W | W | Write |
| Reset or Default Value | ||
| -n | Value after reset or the default value | |
This register is a 16-bit, read-only register that stores the output of the most recent conversion. One LSB equals 7.8125m°C. Data are represented in binary 2's complement format. Following a reset, the temperature register reads –256°C until the first conversion, including averaging, is complete. See the Power Up section for more information.
Return to Register Map.
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| T15 | T14 | T13 | T12 | T11 | T10 | T9 | T8 |
| R-1 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| T7 | T6 | T5 | T4 | T3 | T2 | T1 | T0 |
| R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 |
| BIT | FIELD | TYPE | RESET | DESCRIPTION |
|---|---|---|---|---|
| 15:0 | T[15:0] | R | 8000h | 16-bit, read-only register that stores the most recent temperature conversion results in 2's complement format. |
Return to Register Map.
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| HIGH_Alert | LOW_Alert | Data_Ready | EEPROM_Busy | MOD1(2) | MOD0(1) | CONV2(1) | CONV1(1) |
| R-0 | R-0 | R-0 | R-0 | R/W-0 | R/W-0 | R/W-1 | R/W-0 |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CONV0(1) | AVG1(1) | AVG0(1) | T/nA(1) | POL(1) | DR/Alert(1) | Soft_Reset | — |
| R/W-0 | R/W-0 | R/W-1 | R/W-0 | R/W-0 | R/W-0 | R-0 | R-0 |
| BIT | FIELD | TYPE | RESET | DESCRIPTION |
|---|---|---|---|---|
| 15 | HIGH_Alert | R | 0 | High Alert flag: 1: Set when the conversion result is higher than the high limit 0: Cleared on read of configuration register Therm mode: 1: Set when the conversion result is higher than the therm limit 0: Cleared when the conversion result is lower than the hysteresis |
| 14 | LOW_Alert | R | 0 | Low Alert flag: 1: Set when the conversion result is lower than the low limit 0: Cleared when the configuration register is read Therm mode: Always set to 0 |
| 13 | Data_Ready | R | 0 | Data ready flag. This flag indicates that the conversion is complete and the temperature register can be read. Every time the temperature register or configuration register is read, this bit is cleared. This bit is set at the end of the conversion when the temperature register is updated. Data ready can be monitored on the ALERT pin by setting bit 2 of the configuration register. |
| 12 | EEPROM_Busy | R | 0 | EEPROM busy flag. The value of the flag indicates that the EEPROM is busy during programming or power-up. |
| 11:10 | MOD[1:0] | R/W | 0 | Set conversion mode. 00: Continuous conversion (CC) 01: Shutdown (SD) 10: Continuous conversion (CC), Same as 00 (reads back = 00) 11: One-shot conversion (OS) |
| 9:7 | CONV[2:0] | R/W | 100 | Conversion cycle bit. See Table 8-6 for the standby time between conversions. |
| 6:5 | AVG[1:0] | R/W | 01 | Conversion averaging modes. Determines the number of conversion results that are collected and averaged before updating the temperature register. The average is an accumulated average and not a running average. 00: No averaging 01: 8 Averaged conversions 10: 32 averaged conversions 11: 64 averaged conversions |
| 4 | T/nA | R/W | 0 | Therm/alert mode select. 1: Therm mode 0: Alert mode |
| 3 | POL | R/W | 0 | ALERT pin polarity bit. 1: Active high 0: Active low |
| 2 | DR/Alert | R/W | 0 | ALERT pin select bit. 1: ALERT pin reflects the status of the data ready flag 0: ALERT pin reflects the status of the alert flags |
| 1 | Soft_Reset | R/W | 0 | Software reset bit. When set to 1, this bit triggers a software reset with a duration of 2ms This bit will always read back 0 |
| 0 | — | R | 0 | Not used |
| CONV[2:0] | AVG[1:0] = 00 | AVG[1:0] = 01 | AVG[1:0] = 10 | AVG[1:0] = 11 |
|---|---|---|---|---|
| 000 | 15.5ms | 125ms | 500ms | 1s |
| 001 | 125ms | 125ms | 500ms | 1s |
| 010 | 250ms | 250ms | 500ms | 1s |
| 011 | 500ms | 500ms | 500ms | 1s |
| 100 | 1s | 1s | 1s | 1s |
| 101 | 4s | 4s | 4s | 4s |
| 110 | 8s | 8s | 8s | 8s |
| 111 | 16s | 16s | 16s | 16s |
If the time to complete the conversions needed for a given averaging setting is higher than the conversion setting cycle time, there will be no stand by time in the conversion cycle.
This register is a 16-bit, read/write register that stores the high limit for comparison with the temperature result. One LSB equals 7.8125m°C. The range of the register is ±256°C. Negative numbers are represented in binary 2's complement format. Following power-up or a general-call reset, the high-limit register is loaded with the stored value from the EEPROM. The factory default reset value is 6000h.
Return to Register Map.
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| H15 | H14 | H13 | H12 | H11 | H10 | H9 | H8 |
| R/W-0 | R/W-1 | R/W-1 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| H7 | H6 | H5 | H4 | H3 | H2 | H1 | H0 |
| R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
| BIT | FIELD | TYPE | RESET | DESCRIPTION |
|---|---|---|---|---|
| 15:0 | H[15:0] | R/W | 6000h | 16-bit, read/write register that stores the high limit for comparison with the temperature result. |
This register is configured as a 16-bit, read/write register that stores the low limit for comparison with the temperature result. One LSB equals 7.8125m°C. The range of the register is ±256°C. Negative numbers are represented in binary 2's complement format. The data format is the same as the temperature register. Following power-up or reset, the low-limit register is loaded with the stored value from the EEPROM. The factory default reset value is 8000h.
Return to Register Map.
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| L15 | L14 | L13 | L12 | L11 | L10 | L9 | L8 |
| R/W-1 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| L7 | L6 | L5 | L4 | L3 | L2 | L1 | L0 |
| R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
| BIT | FIELD | TYPE | RESET | DESCRIPTION |
|---|---|---|---|---|
| 15:0 | L[15:0] | R/W | 8000h | 16-bit, read/write register that stores the low limit for comparison with the temperature result. |
Return to Register Map.
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| EUN | EEPROM_Busy | — | — | — | — | — | — |
| R/W-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| — | — | — | — | — | — | — | — |
| R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 |
| BIT | FIELD | TYPE | RESET | DESCRIPTION |
|---|---|---|---|---|
| 15 | EUN | R/W | 0 | EEPROM unlock. 0: EEPROM is locked for programming: writes to all EEPROM addresses (such as configuration, limits, and EEPROM locations 1-4) are written to registers in digital logic and are not programmed in the EEPROM 1: EEPROM unlocked for programming: any writes to programmable registers program the respective location in the EEPROM |
| 14 | EEPROM_Busy | R | 0 | EEPROM busy. This flag is the mirror of the EEPROM busy flag (bit 12) in the configuration register. 0: Indicates that the EEPROM is ready, which means that the EEPROM has finished the last transaction and is ready to accept new commands 1: Indicates that the EEPROM is busy, which means that the EEPROM is currently completing a programming operation or performing power-up on reset load |
| 13:0 | — | R | 0 | Not used |
The EEPROM1 register is a 16-bit register that be used as a scratch pad by the customer to store general-purpose data. This register has a corresponding EEPROM location. Writes to this address when the EEPROM is locked write data into the register and not to the EEPROM. Writes to this register when the EEPROM is unlocked causes the corresponding EEPROM location to be programmed. See the Programming the EEPROM section for more information. EEPROM[4:1] are preprogrammed during manufacturing with the unique ID that can be overwritten. To support NIST traceability do not delete or reprogram the EEPROM[1] register.
Return to Register Map.
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| D15 | D14 | D13 | D12 | D11 | D10 | D9 | D8 |
| R/W-x | R/W-x | R/W-x | R/W-x | R/W-x | R/W-x | R/W-x | R/W-x |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| R/W-x | R/W-x | R/W-x | R/W-x | R/W-x | R/W-x | R/W-x | R/W-x |
| BIT | FIELD | TYPE | RESET | DESCRIPTION |
|---|---|---|---|---|
| 15:0 | D[15:0] | R/W | xxxxh | This 16-bit register can be used as a scratch pad. To support NIST traceability do not delete or re-program this register. |
This register function the same as the EEPROM1 register.
Return to Register Map.
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| D15 | D14 | D13 | D12 | D11 | D10 | D9 | D8 |
| R/W-x | R/W-x | R/W-x | R/W-x | R/W-x | R/W-x | R/W-x | R/W-x |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| R/W-x | R/W-x | R/W-x | R/W-x | R/W-x | R/W-x | R/W-x | R/W-x |
| BIT | FIELD | TYPE | RESET | DESCRIPTION |
|---|---|---|---|---|
| 15:0 | D[15:0] | R/W | xxxxh | This 16-bit register can be used as a scratch pad. |
Use this 16-bit register as a user-defined temperature offset register during system calibration. The offset will be added to the temperature result after linearization. This register has a same resolution of 7.8125m°C and the same range of ±256°C as the temperature result register. The data format is the same as the temperature register. If the added result is out of boundary, then the temperature result will show as the maximum or minimum value.
Return to Register Map.
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| D15 | D14 | D13 | D12 | D11 | D10 | D9 | D8 |
| R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
| BIT | FIELD | TYPE | RESET | DESCRIPTION |
|---|---|---|---|---|
| 15:0 | D[15:0] | R/W | 0 | Temperature offset data from system calibration. |
This register function is the same as the EEPROM1 register. To support NIST traceability, do not delete or reprogram the EEPROM[1] register.
Return to Register Map.
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| D15 | D14 | D13 | D12 | D11 | D10 | D9 | D8 |
| R/W-x | R/W-x | R/W-x | R/W-x | R/W-x | R/W-x | R/W-x | R/W-x |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| R/W-x | R/W-x | R/W-x | R/W-x | R/W-x | R/W-x | R/W-x | R/W-x |
| BIT | FIELD | TYPE | RESET | DESCRIPTION |
|---|---|---|---|---|
| 15:0 | D[15:0] | R/W | xxxxh | This 16-bit register is used as a scratch pad. To support NIST traceability, do not delete or re-program this register. |
This read-only register indicates the device ID.
Return to Register Map.
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| Rev3 | Rev2 | Rev1 | Rev0 | DID11 | DID10 | DID9 | DID8 |
| R-0 | R-0 | R-1 | R-0 | R-0 | R-0 | R-0 | R-1 |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| DID7 | DID6 | DID5 | DID4 | DID3 | DID2 | DID1 | DID0 |
| R-0 | R-0 | R-0 | R-1 | R-0 | R-1 | R-1 | R-1 |
| BIT | FIELD | TYPE | RESET | DESCRIPTION |
|---|---|---|---|---|
| 15:12 | Rev[3:0] | R | 2h | Indicates the revision number. |
| 11:0 | DID[11:0] | R | 117h | Indicates the device ID. |