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ZHCSQ68A May 2022 – December 2022 TLIN1431-Q1

PRODUCTION DATA

封裝選項

請參考 PDF 數據表獲取器件具體的封裝圖。

機械數據 (封裝 | 引腳)

RGY|20

散熱焊盤機械數據 (封裝 | 引腳)

訂購信息

zhcsq68a_oa

8.4 Device Functional Modes

The TLIN1431x-Q1 has multiple functional modes of operation, Init, pin/SPI Init, normal, standby, sleep, restart and fail-safe. The next sections describe these modes as well as how the device moves between the different modes. Figure 8-24 and Figure 8-25 graphically shows the relationship while Table 8-4 and tables show the state of pins in each control mode. Upon power up, and once V_CC ≥ UV_CC prior to t_{INACT_FS} timing out the device enters an initialization mode (INIT). While in this mode, V_CC is ramping, nRST ramps with V_CC, all other pins are off except for monitoring the state of the Pin/nCS pin to determine which control method is being implemented. Once the control method is determined, the device follows the pin control or SPI control path of the state diagram.

Table 8-4 Operating PIN Mode

Function	Restart Mode	Sleep Mode	Standby Mode	Normal Mode	Fail-safe Mode	Fast Mode
EN	NA	Low	Low	High	NA	Pulse then high
RXD	High	Floating	Low for a wake event and power up event otherwise high	Mirrors LIN bus	Floating	Mirrors LIN bus
LIN BUS Termination	Weak current pull-up	Weak current pull-up	45 kΩ (typical)	45 kΩ (typical)	Weak current pull-up	45 kΩ (typical)
Vbat Voltage Divider	Off	Off	On	On	Fault dependent	On
Transmitter	Off	Off	Off	On	Off	On (Slope control off)
Watchdog	Off	Off	On with long first pulse	On	Off	On but only sets flag
nRST Pin	Low	Low	High	High	LDO state dependent	High
WAKE Pin	Off	On	On	Off	On	Off
WKRQ/INH	On	Off	On	On	INH - On; WKRQ - Fault dependent	On
LIMP	Same as previous state when due to a WD fault Turns off when exiting fail-safe mode due to any other fault	Off	Previous state prior to entering STBY due to WD fault	Previous state prior to entering normal mode due to WD fault	On	Previous state prior to entering fast mode due to WD fault
HSS	Off	Off	On and controlled by HSSC pin	On and controlled by HSSC pin	Off	On and controlled by HSSC pin
V_CC	Ramping	Off	On	On	Fault dependent	On
Comment		nRST is internally connected to the LDO output which in sleep mode is off	Wake up event detected, waiting on processors to set EN	LIN transmission up to 20 kbps	LDO off for TSD, V_CCSC or OV_CC events	LIN transmission up to 200 kbps

Note:

LDO state for fault dependent in fail-safe mode is as follows:

Watchdog error - On
Thermal shut down - Off
UV_CC - On
OV_CC over-voltage - Off
V_CCSC - Off
Restart counter exceeded - On
SWE timer expiration - On

If TXD is held dominant when device enters normal or fast modes, the LIN transmitter does not turn on until the TXD pin goes recessive.

If V_SUP is ≤ UV_SUP WKRQ/INH is off.

WKRQ depends upon the LDO being on, so any event that causes the LDO to be turned off will turn off WKRQ.

Any WD failure in Fast Mode will only set interrupt and not take any other action (will not set LIMP, transition to Fail-safe or Restart or take any WD fail action)

nRST depends upon the LDO state. When LDO is on, nRST reflects the LDO value.
- When LDO is on, nRST reflects the LDO or I/O voltage value except for a UV_CC event where nRST is low.
- When LDO is off, nRST is low.

Table 8-5 Operating SPI Mode

Function	Restart Mode	Sleep Mode	Standby Mode	Normal Mode	Fail-safe Mode	Fast Mode
RXD	High	Floating	Low for a wake event and power up event otherwise high	Mirrors LIN bus	Fault dependent	Mirrors LIN bus
LIN BUS Termination	Weak current pull-up	Weak current pull-up	45 kΩ (typical)	45 kΩ (typical)	Weak current pull-up	45 kΩ (typical)
Vbat Voltage Divider	Off	Off	On	On	Fault dependent	On
Transmitter	Off	Off	Off	On	Off	On (Slope control off)
Watchdog	Off	Off	Default on with long first window but programmable off	On If programmed off in standby mode when entering normal mode a long first window is implemented	Off	On but only sets flag
SPI pins	Off	Off	On	On	Fault dependent	On
nINT pin	Off	Off	On	On	Fault dependent	On
nRST pin	Low	Low	High	High	LDO state dependent	High
WAKE Pin	Off	On	On	Off	On	Off
WKRQ/INH	On	Off	On	On	INH - On; WKRQ - Fault dependent	On
LIMP	Same as previous state when due to a WD fault When exiting fail-safe mode due to any other fault how 8'h1A[3:2] is programmed determines how LIMP is cleared	Off	Previous state prior to entering STBY due to WD fault	Previous state prior to entering normal mode due to WD fault	On	Previous state prior to entering fast mode due to WD fault
HSS	Off	Off unless cyclic sensing enabled	On	On	Off	On
V_CC	Ramping	Off	On	On	Fault dependent	On
Comment		nRST is internally connected to the LDO output which in sleep mode is off	Wake up event detected, waiting on processors	LIN transmission up to 20 kbps	LDO off for TSD, V_CCSC or OV_CC events	LIN transmission up to 200 kbps

Note:

Function status when in fail-safe mode that states fault dependent are defined in Table 8-6

If TXD is held dominant when device enters normal or fast modes, the LIN transmitter does not turn on until the TXD pin goes recessive.

If V_SUP is ≤ UV_SUP WKRQ/INH is off.

WKRQ depends upon the LDO being on, so any event that causes the LDO to be turned off will turn off WKRQ.

Any WD failure in Fast Mode will only set interrupt and not take any other action (will not set LIMP, transition to Fail-safe or Restart or take any WD fail action)

Table 8-6 Fault Dependent States In Fail-safe Mode

Function	Watchdog Error	Thermal Shutdown	UV_CC	V_CC Over Voltage	V_CCSC	Restart Counter Exceeded
LDO ⁽²⁾	On	Off	On	Off	Off	On ⁽¹⁾
INH	Programmed	On	On	On	On	On
WKRQ	Programmed	Off	Off	Off	Off	On
SPI	On	Off	On	Off	Off	On

(1) LDO is on in fail-safe mode if the restart counter causes the change when fail-safe mode is enabled.

(2) LDO is on in fail-safe mode if the SWE timer times out causing the device to enter fail-safe mode if enabled.

Figure 8-24 Pin control state diagram

Note:

Normal mode can be entered from Fast mode with TXD in either state:

TXD = high, EN = pulse < t_{FM_CHANGE} and nRST = high
TXD = low, nRST = high and EN pulse can be any width

Figure 8-25 SPI control state diagram