ZHCSQ68A May 2022 – December 2022 TLIN1431-Q1
PRODUCTION DATA
nRST_CNTL is shown in Figure 8-84 and described in Table 8-40
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Configures nRST pin and FSO pin.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RSVD | nRST_PULSE_WIDTH | FSO_POL_SEL | FSO_SEL | RSVD | |||
| R-00b | R/W-0b | R/W-0b | R/W/H-000b | R-0b | |||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 7-6 | RSVD | R | 00b | Reserved |
| 5 | nRST_PULSE_WIDTH | R/W | 0b | Sets the pulse width for toggling nRST from high-->low-->high when device enters restart mode (ms) 0b = 2 1b = 15 |
| 4 | FSO_POL_SEL | R/W | 0b | Selects the polarity for the FSO pin 0b = Active low 1b = Active high Note: Selects the output level when register 8'h29[3:1] = 110b making the pin a general-purpose output pin; 0 = Low and 1 = High |
| 3-1 | FSO_SEL | R/W/H | 000b | Selects the information that will cause this pin to be pulled to the state selected by 'h29[4] 000b = VCC Interrupt (overvoltage, undervoltage or short) 001b = WD interrupt event 010b = Reserved 011b = Local wake request (LWU) 100b = Bus wake request (WUP) 101b = Fail-safe mode entered 110b = General purpose output 111b = Reserved |
| 0 | RSVD | R | 0b | Reserved |