ZHCSMU9A December 2020 – September 2021 TAS2764
PRODUCTION DATA
The TAS2764 has a noise-gate feature that monitors the input signal and powers down the class-D when the signal goes below the threshold set by NG_LVL[1:0] bits for longer than the time set by NG_HYST[1:0] register bits. When the signal goes above the threshold the class-D will re-power in 7 samples before the samples applied to the audio input interface reach the class-D bridge. This feature is enabled by setting NG_EN bit to high. Once enabled it is able to power up and down the channel within the device processing delay requiring no additional external control. Volume ramping can be also used during noise gate operations by setting NG_DVR_EN bit to low.
The noise gate can be configured with finer resolution at the expense of additional I2C writes. Use NGFR_EN bit to enable this mode and register bits NGFR_LVL[31:0] to set the fine resolution. The fine resolution hysteresis is set using NGFR_HYST[18:3] register bits.
When noise gate is enabled, once the signal is applied, the TAS2764 will be recovering from noise gate. In this case, a shutdown command, if needed, can be programmed in two ways:
- after muting (zero-ing) the incoming data (recommended);
- 100 us after TAS2764 is exiting noise gate (incoming signal is not zero-ed).