ZHCSH29B April 2017 – December 2018 LP87524B-Q1 , LP87524J-Q1 , LP87524P-Q1
PRODUCTION DATA.
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
Address: 0x28
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| PG3_SEL[1:0] | PG2_SEL[1:0] | PG1_SEL[1:0] | PG0_SEL[1:0] |
| Bits | Field | Type | Default | Description |
|---|---|---|---|---|
| 7:6 | PG3_SEL[1:0] | R/W | 0x1* | PGOOD signal source control from Buck3
0x0 - Masked 0x1 - Power-Good-threshold voltage 0x2 - Reserved, do not use 0x3 - Power-Good-threshold voltage AND current limit |
| 5:4 | PG2_SEL[1:0] | R/W | 0x1* | PGOOD signal source control from Buck2
0x0 - Masked 0x1 - Power-Good-threshold voltage 0x2 - Reserved, do not use 0x3 - Power-Good threshold voltage AND current limit |
| 3:2 | PG1_SEL[1:0] | R/W | 0x1* | PGOOD signal source control from Buck1
0x0 - Masked 0x1 - Power-Good-threshold voltage 0x2 - Reserved, do not use 0x3 - Power-Good-threshold voltage AND current limit |
| 1:0 | PG0_SEL[1:0] | R/W | 0x1* | PGOOD signal source control from Buck0
0x0 - Masked 0x1 - Power-Good-threshold voltage 0x2 - Reserved, do not use 0x3 - Power-Good-threshold voltage AND current limit |