4 Revision History
Changes from Revision D (May 2020) to Revision E (July 2022)
- 更新了整個(gè)文檔中的表格、圖和交叉參考的編號(hào)格式Go
- 在整個(gè)數(shù)據(jù)表中添加了包容性術(shù)語(yǔ)Go
- Changed CDON_IN0 and CDOFF_IN0 Test Condition
to "11.88 Gbps PRBS10 pattern"Go
- Removed 12G/6G from VDC_WANDER Test
ConditionGo
- Added table note to Serial Parallel Interface (SPI) Timing
SpecificationsGo
- Updated Line-Side Adaptive Cable Equalizer (SDI_IO+ in EQ
mode)Go
- Updated Line-Side Output Cable Driver (SDI_IO+ in CD mode, SDI_OUT+
in EQ or CD mode)Go
Changes from Revision C (July 2019) to Revision D (May 2020)
- Changed HBM ESD rating and added pin 27 description Go
Changes from Revision B (September 2017) to Revision C (July 2019)
Changes from Revision A (July 2017) to Revision B (September 2017)
- Changed NTpsmax test condition max from 6 GHz to 50 MHz and < 20 mVp-p NOM to < 10 mVp-p Go
- Changed tR_F_SDI minimum SD rise/fall time from 390 ps to 400 ps due to incorrect default settingsGo
- Changed typical tR/tF of OUT0 from 35 ps to 45 ps Go
- Added PRBS10 pattern to clarify AJCD_MODE and TMJCD_MODE Test ConditionGo
- Added SMBUS SCL min frequency per SMBus 2.0 specifications Go
- Added
Figure 7-1
to clarify definition of SMBus Timing Parameters in
Section 7.6
Go
- Added typical characteric curves for OUT0 VOD and de-emphasis vs. LMH1297 register settingsGo
- Added default internal pullup and pulldown settings for 2-level strap pins in
Figure 9-1
Go
- Added clarification in Table 9-1 regarding reclocker behavior when used with non-SDI data rates Go
- Changed Step 6 description in
Section 9.2.1.2
to include both pin and register settings to switch between EQ mode
and CD mode.Go
Changes from Revision * (March 2017) to Revision A (July 2017)
- 根據(jù)更新的特性數(shù)據(jù)將 CD 模式下的典型功率消耗從 315mW 更改成了 305mWGo
- Changed typical and maximum current dissipation based on updated complete characterization dataGo
- Changed maximum current dissipation when acquiring lock based on updated complete characterization dataGo
- Changed TMJCD_MODE maximum spec from 8 UI to 0.45 UI typical because parameter is system dependent Go
- Added tablenote to optimize PLL bandwidth for 11.88 Gbps Go
- Changed Digital MUTEREF description to apply to SDI_IO+, not IN0+ Go
- Added the
Section 9.1.3
sectionGo
- Added the package orderable addendum to the selective disclosure
data sheet Go