The design procedure for bidirectional
I/O applications is as follows:
- Select a power supply that meets
the DC and AC requirements in Section 7.3.
- Choose a small 0402 surface mount
ceramic capacitor for AC-coupling capacitors to maintain characteristic
impedance.
- Choose a high-quality, 75-Ω BNC
connector that is capable of supporting 11.88-Gbps applications. Consult a BNC
supplier regarding insertion loss, impedance specifications, and recommended
footprint for meeting SMPTE return loss.
- Follow detailed high-speed layout
recommendations provided in Section 11.1 to ensure optimal signal quality when interconnecting 75-? and 100-?
signals to the LMH1297.
- Determine whether SPI or SMBus
communication is necessary. If the LMH1297 must be programmed with settings
other than what is offered by pin control, users must use SPI or SMBus mode for
additional programming.
- Configure EQ/CD_SEL, OUT0_SEL,
and SDI_OUT_SEL pins according to the desired default use case. In a
bidirectional I/O application, the EQ/CD_SEL pin or register settings may be
modified to switch between EQ mode and CD mode.
- Configure the LMH1297 in EQ mode.
Tune the HOST_EQ0 100-? driver control pin to equalize the PCB output trace
following OUT0±. Use register control for more tuning options if necessary.
- Configure the LMH1297 in CD mode.
Tune the SDI_VOD output amplitude control pin for optimal signal quality
depending on the cable length attached at SDI_IO+ and SDI_OUT+. Use register
control for more tuning options if necessary.