ZHCSIK7C July 2018 – June 2025 ESD321
PRODUCTION DATA
- 1
- 1 特性
- 2 應用
- 3 說明
- 4 Pin Configuration and Functions
- 5 Specifications
- 6 Detailed Description
- 7 Application and Implementation
- 8 Device and Documentation Support
- 9 Revision History
- 10Mechanical, Packaging, and Orderable Information
封裝選項
機械數(shù)據(jù) (封裝 | 引腳)
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
- DPY|2
訂購信息
5.7 Typical Characteristics
Figure 5-1 TLP I-V Curve, I/O Pin to
GND (tp = 100ns)
Figure 5-3 8kV IEC 61000-4-2
Clamping Voltage Waveform, I/O Pin to GND
Figure 5-5 DC Voltage Sweep I-V Curve, I/O Pin to GND
Figure 5-7 Capacitance vs. Bias Voltage For Different Temperatures (°C)
Figure 5-9 Insertion Loss vs. Frequency
Figure 5-2 TLP I-V Curve, GND to I/O
Pin (tp = 100ns)
Figure 5-4 8kV IEC 61000-4-2
Clamping Voltage Waveform, GND to I/O Pin
Figure 5-6 Surge Curve (IEC
61000-4-5, tp=8/20μs), I/O Pin to GND
Figure 5-8 Leakage Current (at 3.6V
Bias) Across Temperature, I/O Pin to GND