ZHCSEP5D January 2016 – November 2018 DRV8884
PRODUCTION DATA.
If at any time the voltage on the VM pin falls below the VM UVLO threshold voltage (VUVLO), all FETs in the H-bridge will be disabled, the charge pump will be disabled, the logic will be reset, the DVDD regulator is disabled, and the nFAULT pin will be driven low. Operation resumes when VM rises above the UVLO threshold. The nFAULT pin is released after operation has resumed. Decreasing VM below this undervoltage threshold will reset the indexer position.