ZHCSG01C February 2017 – August 2018 DRV8320 , DRV8320R , DRV8323 , DRV8323R
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Three Phase Smart Gate Drivers
- 8.3.2 DVDD Linear Voltage Regulator
- 8.3.3 Pin Diagrams
- 8.3.4 Low-Side Current Sense Amplifiers (DRV8323 and DRV8323R Only)
- 8.3.5 Step-Down Buck Regulator
- 8.3.6 Gate Driver Protective Circuits
- 8.4 Device Functional Modes
- 8.5 Programming
- 8.6
Register Maps
- Table 1. DRV832xS and DRV832xRS Register Map
- 8.6.1 Status Registers
- 8.6.2 Control Registers
-
9 Application and Implementation
- 9.1 Application Information
- 9.2
Typical Application
- 9.2.1
Primary Application
- 9.2.1.1 Design Requirements
- 9.2.1.2 Detailed Design Procedure
- 9.2.1.3 Application Curves
- 9.2.2 Alternative Application
- 9.2.1
Primary Application
- 10Power Supply Recommendations
- 11Layout
- 12器件和文檔支持
- 13機械、封裝和可訂購信息
9.2.1.2.3.1 Example
The goal of this example is to set the VDS monitor to trip at a current greater than 100 A. According to the CSD18536KCS 60 V N-Channel NexFET™ Power MOSFET data sheet, the RDS(on) value is 1.8 times higher at 175°C, and the maximum RDS(on) value at a VGS of 10 V is 1.6 mΩ. From these values, the approximate worst-case value of RDS(on) is 1.8 × 1.6 mΩ = 2.88 mΩ.
Using Equation 17 with a value of 2.88 mΩ for RDS(on) and a worst-case motor current of 100 A, Equation 18 shows the calculated the value of the VDS monitors.
For this example, the value of VDS_OCP was selected as 0.31 V.
The SPI devices allow for adjustment of the deglitch time for the VDS overcurrent monitor. The deglitch time can be set to 2 µs, 4 µs, 6 µs, or 8 µs.