ZHCSG01C February 2017 – August 2018 DRV8320 , DRV8320R , DRV8323 , DRV8323R
PRODUCTION DATA.
To minimize DC offset, the DRV8323 and DRV8323R devices can perform an automatic offset calibration through the SPI registers (CSA_CAL_X) or CAL pin. When the calibration is enabled, the inputs to the amplifier are shorted, the load is disconnected, and the gain (GCSA) of the amplifier is changed to the 40 V/V setting. The amplifier then goes through an automatic trim routine to minimize the input offset. The automatic trim routine requires 100 µs to complete after the calibration is enabled. After this time, the inputs of the amplifier stay shorted, the load stays disconnected, and the gain stays at 40 V/V if further offset calibration is desired to be done by the external controller. To complete the offset calibration, the CSA_CAL_X registers or CAL pin should be taken back low. The gain is returned to the original gain setting after the device completes calibration. For the best results, perform offset calibration when the external MOSFETS are not switching to decrease the potential noise impact to the amplifier. When the current sense amplifiers go into a calibration mode, the VREF pin is set to bidirectional mode if the device is configured in unidirectional mode. The setting of the VREF pin affects the channels all three current sense amplifier, even if the CSA_CAL_X register is not set for the all channels.