1 Introduction

The CDCLVP111-SEP is a radiation-hardened clock driver that distributes one differential clock pair of LVPECL inputs (CLK0, CLK1) to ten pair of differential LVPECL clock inputs (Q0, Q9) with minimal skew, additive jitter, and propagation delays for clock distribution. With an internal multiplexer, the device can accept two clock sources. By using the VBB reference voltage, the device can accept single-ended clock inputs. The output driver is specifically designed for driving 50Ω transmission lines. The CDCLVP111-SEP device is packaged on a 32pin, thermally-enhanced qual-flat-package (HLQFP). The operational temperature is specified from –55°C to 125°C. General device information and test conditions are listed in Table 1-1.