SLUUD50 October 2024 BQ27Z758
| Class | Subclass | Name | Type | Min | Max | Default | Unit |
|---|---|---|---|---|---|---|---|
| Settings | Protection | Protection Configuration | H2 | 0x00 | 0x02 | 0x00 | Hex |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RSVD | RSVD | RSVD | RSVD | RSVD | RSVD | CUV_RECOV_CHG | RSVD |
| RSVD (Bits 7–2): Reserved. Do not use. | ||
| CUV_RECOV_CHG (Bit 1): Require charge to recover SafetyStatus()[CUV] | ||
| 1 = | Enabled | |
| 0 = | Disabled (default) | |
| RSVD (Bit 0): Reserved. Do not use. | ||
| Class | Subclass | Name | Type | Min | Max | Default | Unit |
|---|---|---|---|---|---|---|---|
| Settings | Protection | Enabled Protections A | H2 | 0x00 | 0xFF | 0x57 | Hex |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RSVD | RSVD_1 | RSVD | OCD | RSVD | OCC | COV | CUV |
| RSVD (Bit 7): Reserved. Do not use. | ||
| RSVD_1 (Bit 6): Reserved and programmed to 1 for proper operation. Do not use. | ||
| RSVD (Bit 5): Reserved. Do not use. | ||
| OCD (Bit 4): Overcurrent in Discharge | ||
| 1 = | Enabled (default) | |
| 0 = | Disabled | |
| RSVD (Bit 3): Reserved. Do not use. | ||
| OCC (Bit 2): Overcurrent in Charge | ||
| 1 = | Enabled (default) | |
| 0 = | Disabled | |
| COV (Bit 1): Cell Overvoltage | ||
| 1 = | Enabled (default) | |
| 0 = | Disabled | |
| CUV (Bit 0): Cell Undervoltage | ||
| 1 = | Enabled (default) | |
| 0 = | Disabled | |
| Class | Subclass | Name | Type | Min | Max | Default | Unit |
|---|---|---|---|---|---|---|---|
| Settings | Protection | Enabled Protections B | H2 | 0x00 | 0xFF | 0x35 | Hex |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RSVD | RSVD | OTD | OTC | RSVD | RSVD_1 | RSVD | RSVD_1 |
| RSVD (Bits 7–6): Reserved. Do not use. | ||
| OTD (Bit 5): Overtemperature in discharge | ||
| 1 = | Enabled (default) | |
| 0 = | Disabled | |
| OTC (Bit 4): Overtemperature in charge | ||
| 1 = | Enabled (default) | |
| 0 = | Disabled | |
| RSVD (Bit 3): Reserved. Do not use. | ||
| RSVD_1 (Bit 2): Reserved and programmed to 1 for proper operation. Do not use. | ||
| RSVD (Bit 1): Reserved. Do not use. | ||
| RSVD_1 (Bit 0): Reserved and programmed to 1 for proper operation. Do not use. | ||
| Class | Subclass | Name | Type | Min | Max | Default | Unit |
|---|---|---|---|---|---|---|---|
| Settings | Protection | Enabled Protections C | H1 | 0x00 | 0xFF | 0x14 | Hex |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RSVD | RSVD | RSVD | CTO | RSVD | PTO | RSVD | RSVD |
| RSVD (Bits 7–5): Reserved. Do not use. | ||
| CTO (Bit 4): Charging timeout | ||
| 1 = | Enabled (default) | |
| 0 = | Disabled | |
| RSVD (Bit 3): Reserved. Do not use. | ||
| PTO (Bit 2): Precharging timeout | ||
| 1 = | Enabled (default) | |
| 0 = | Disabled | |
| RSVD (Bits 1–0): Reserved. Do not use. | ||
| Class | Subclass | Name | Type | Min | Max | Default | Unit |
|---|---|---|---|---|---|---|---|
| Settings | Protection | Enabled Protections D | H1 | 0x00 | 0xFF | 0xCC | Hex |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RSVD_1 | RSVD_1 | RSVD | RSVD | UTD | UTC | RSVD | RSVD |
| RSVD_1 (Bit 7): Reserved and programmed to 1 for proper operation. Do not use. | ||
| RSVD_1 (Bit 6): Reserved and programmed to 1 for proper operation. Do not use. | ||
| RSVD (Bits 5–4): Reserved. Do not use. | ||
| UTD (Bit 3): Undertemperature While Not Charging | ||
| 1 = | Enabled (default) | |
| 0 = | Disabled | |
| UTC (Bit 2): Undertemperature While Charging | ||
| 1 = | Enabled (default) | |
| 0 = | Disabled | |
| RSVD (Bits 1–0): Reserved. Do not use. | ||