ZHCSRQ4 august 2023 TPSM8S6C24
PRODUCTION DATA
| CMD Address | 1Bh (with CMD byte = 7Eh) |
| Write Transaction: | Write Word |
| Read Transaction: | Block-Write/Block-Read Process Call |
| Format: | Unsigned Binary (1 byte) |
| Phased: | No, Only PHASE = FFh is supported |
| NVM Back-up: | EEPROM |
| Updates: | On-the-fly |
SMBALERT_MASK bits for STATUS_CML
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RW | RW | RW | RW | R | R | RW | R |
| mIVC | mIVD | mPEC | mMEM | 0 | 0 | mCOMM | 0 |
| LEGEND: R/W = Read/Write; R = Read only |
| Bit | Field | Access | Reset | Description |
|---|---|---|---|---|
| 7 | mIVC | RW | NVM | 0b: SMBALERT may assert due to this condition. 1b: SMBALERT may NOT assert due to this condition. |
| 6 | mIVD | RW | NVM | 0b: SMBALERT may assert due to this condition. 1b: SMBALERT may NOT assert due to this condition. |
| 5 | mPEC | RW | NVM | 0b: SMBALERT may assert due to this condition. 1b: SMBALERT may NOT assert due to this condition. |
| 4 | mMEM | RW | NVM | 0b: SMBALERT may assert due to this condition. 1b: SMBALERT may NOT assert due to this condition. |
| 3:2 | Not supported | R | 00b | Not supported |
| 1 | mCOMM | RW | NVM | 0b: SMBALERT may assert due to this condition. 1b: SMBALERT may NOT assert due to this condition. |
| 0 | Not supported | R | 0b | Not supported |