ZHCSPT6D July 2023 – June 2024 TPSM8287A06 , TPSM8287A10 , TPSM8287A12 , TPSM8287A15
PRODUCTION DATA
- 1
- 1 特性
- 2 應(yīng)用
- 3 說(shuō)明
- 4 Device Options
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Fixed-Frequency DCS-Control Topology
- 7.3.2 Forced-PWM and Power-Save Modes
- 7.3.3 Precise Enable
- 7.3.4 Start-Up
- 7.3.5 Switching Frequency Selection
- 7.3.6 Output Voltage Setting
- 7.3.7 Compensation (COMP)
- 7.3.8 Mode Selection / Clock Synchronization (MODE/SYNC)
- 7.3.9 Spread Spectrum Clocking (SSC)
- 7.3.10 Output Discharge
- 7.3.11 Undervoltage Lockout (UVLO)
- 7.3.12 Overvoltage Lockout (OVLO)
- 7.3.13 Overcurrent Protection
- 7.3.14 Power Good (PG)
- 7.3.15 Remote Sense
- 7.3.16 Thermal Warning and Shutdown
- 7.3.17 Stacked Operation
- 7.4 Device Functional Modes
- 7.5 Programming
- 8 Device Registers
-
9 Application and Implementation
- 9.1 Application Information
- 9.2 Typical Application
- 9.3 Typical Application Using Four TPSM8287Axx in Parallel Operation
- 9.4 Power Supply Recommendations
- 9.5 Layout
- 10Device and Documentation Support
- 11Revision History
- 12Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RDW|39
散熱焊盤(pán)機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購(gòu)信息
5 Pin Configuration and Functions
Figure 5-1 TPSM8287Axx RDV and RDW Package, B0QFN 39 Pin
| PIN | TYPE(1) | DESCRIPTION | |
|---|---|---|---|
| NO. | NAME | ||
| 35 | GOSNS | I | Output ground sense (differential output voltage sensing). Connect at the load. |
| 36 | VOSNS | I | Output voltage sense (differential output voltage sensing). Connect at the load. |
| 1 | EN | I | This pin is the enable pin of the device. The user must connect to it using a series resistor of at least 15 kΩ. A low logic level on this pin disables the device, and a high logic level on this pin enables the device. Do not leave this pin unconnected. For stacked operation, connect the EN pins of all stacked devices together with a resistor to the supply voltage or a GPIO of a processor. See Stacked Operation for a detailed description. |
| 4, 27 | VIN | P | Power supply input. Connect an input capacitor as close as possible between each VIN and GND (on both sides of the package). |
| 5, 6, 7, 8, 24, 25, 26 | GND | GND | Ground pin |
| 9 - 22 | VOUT | P | Output voltage pin |
| 23 | SW | O | This pin is the switch pin of the converter and is connected to the internal Power MOSFETs. This pin can be left floating. |
| 33 | PG | I/O | Open-drain power-good output with window comparator. This pin is pulled to GND while VOUT is outside the power-good threshold. This pin can be left open or tied to GND if not used in single device operation. A pullup resistor can be connected to any voltage not larger than 6.5 V. In stacked operation, connect the PG pins of all stacked devices together. Only the PG pin of the primary converter in stacked operation is an open drain output. For devices that are defined as secondary converters in stacked mode, the pin is an input pin. See Stacked Operation for a detailed description. |
| 29 | MODE/SYNC | I | The device runs in power save mode when this pin is pulled low. If the pin is pulled high, the device runs in forced-PWM mode. If unused, this pin can be left floating and an internal pulldown resistor pulls it low. The pin can also be used to synchronize the device to an external clock. See Section 7.3.8 for a detailed description. |
| 30 | SDA | I/O | I2C serial data pin. Do not leave floating. Connect a pullup resistor to a logic high level. For secondary devices in stacked operation, or if the I2C interface is not used, connect the pin to GND. |
| 31 | SCL | I | I2C serial clock pin. Do not leave this pin floating. Connect a pullup resistor to a logic high level. For secondary devices in stacked operation, or if the I2C interface is not used, connect the pin to GND. |
| 32 | SYNC_OUT | I/O | Internal clock output pin for synchronization in stacked mode. Leave this pin floating for single device operation. Connect this pin to the MODE/SYNC pin of the next device in the daisy-chain in stacked operation. Do not use this pin to connect to a non-TPSM8287Axx device. During start-up, this pin is used to identify if a device must operate as a secondary converter in stacked operation. Connect a 47-kΩ resistor from this pin to GND to define a secondary converter in stacked operation. See Stacked Operation for a detailed description. |
| 28 | VSET1 | I/O | Start-up output voltage and I2C address selection pin. A resistor or short circuit to GND or VIN defines the selected output voltage and I2C address. See Table 7-2. |
| 3 | VSET2 | I/O | |
| 2 | VSET3 | I/O | |
| 34 | COMP | I/O | Device compensation input. A resistor and capacitor from this pin to GOSNS define the compensation of the control loop. In stacked operation, connect the COMP pins of all stacked devices together and connect a resistor and capacitor between the common COMP node and GOSNS. |
| 37, 38 | GND Exposed Thermal Pad | — | The thermal pad must be soldered to GND to achieve an appropriate thermal resistance and for mechanical stability. |
| 39 | VOUT Exposed Thermal Pad | — | The thermal pad must be soldered to VOUT to achieve an appropriate thermal resistance and for mechanical stability. |