ZHCSEF7G December 2014 – February 2019 TPS659037
PRODUCTION DATA.
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| Input capacitance (C9, C10, C11, C12, C13) | 4.7 | µF | ||||
| Output capacitance (C18, C19, C21, C22)(1) | SMPS12 or SMPS45 dual phase operation, per phase | 33 | 47 | 57 | µF | |
| Output capacitance, (C20, C24)(1) | SMPS3 and SMPS7 (triple phase operation) | 33 | 47 | 57 | µF | |
| CESR | Filtering capacitor ESR | 1 MHz ≤ f ≤ 10 MHz | 2 | 10 | mΩ | |
| Output filter inductance (L1, L2, L3, L4, L5) | SMPSx_SW | 0.7 | 1 | 1.3 | µH | |
| DCRL | Filter inductor DC resistance | 50 | 100 | mΩ | ||
| VSMPSx | Input voltage range, SMPSx_IN | Connected to VSYS (VCC1) | 3.135 | 5.25 | V | |
| VOSMPSx | Output voltage, programmable, SMPSx | RANGE = 0 (value for RANGE must not be changed when SMPS is active). In Eco-mode the output voltage values are fixed (defined before Eco-mode is enabled). RANGE = 1 is not supported for Multi-phase regulators. | 0.7 | 1.65 | V | |
| Step size, 0.7 V ≤ VO ≤ 1.65 V (RANGE = 0) | 10 | mV | ||||
| DC output voltage accuracy, includes voltage references, DC load/line regulation, process and temperature | Eco-mode | –3% | 4% | |||
| Forced PWM mode | –1% | 2% | ||||
| Ripple, dual phase | Maximum load, VI = 3.8 V, VO = 1.2 V, ESRCO = 2 mΩ, measure with 20-MHz LPF | 4 | mVPP | |||
| Ripple, triple phase | Maximum load, VI = 3.8 V, VO = 1.2 V, ESRCO = 2 mΩ, measure with 20-MHz LPF | 1 | mVPP | |||
| ΔVO(ΔVI) | DC line regulation | 0.1 | %/V | |||
| ΔVO(ΔIO) | DC load regulation | 0.1 | %/A | |||
| Transient load step response, dual phase | IO = 0.8 to 2 A, tr = tf = 400 ns, CO = 47 µF , L= 1 µH | 3% | ||||
| Transient load step response, triple phase | IO = 0.8 to 2 A, tr = tf = 400 ns, CO = 47 µF , L= 1 µH | 3% | ||||
| Transient load step response, dual or triple phase | IO = 0.5 to 500 mA, tr = tf = 100 ns, CO = 47 µF , L= 1 µH | 3% | ||||
| IOmax | Rated output current, SMPS12 | Advance thermal design is required to avoid thermal shutdown | 6 | A | ||
| Rated output current, SMPS123 | Advance thermal design is required to avoid thermal shutdown | 9 | ||||
| Rated output current, SMPS45 | Advance thermal design is required to avoid thermal shutdown | 4 | ||||
| Maximum output current, Eco-mode | 5 | mA | ||||
| I(LIM_HS_FET) | High-side MOSFET forward current-limit | SMPS123, each phase | 3.7 | 4 | A | |
| SMPS45, each phase | 2.7 | 3 | ||||
| I(LIM_LS_FET) | Low-side MOSFET forward current-limit | SMPS123, each phase | 3.7 | A | ||
| SMPS45, each phase | 2.7 | |||||
| Low-side MOSFET negative current-limit | SMPS123, phase 1 | 0.6 | A | |||
| SMPS45, phase 4 | 0.6 | |||||
| rDS(on_HS_FET) | N-channel MOSFET on-resistance, high-side FET | SMPS123, each phase | 115 | mΩ | ||
| SMPS45, each phase | 115 | |||||
| rDS(on_LS_FET) | N-channel MOSFET on-resistance, low-side FET | SMPS123, each phase | 30 | mΩ | ||
| SMPS45, each phase | 30 | |||||
| t(start) | Time from enable to start of the ramp | 150 | µs | |||
| t(ramp) | Time from enable to 80% of VO | CO < 57 µF per phase, no load | 400 | 1000 | µs | |
| Overshoot during turnon | 5% | |||||
| Output voltage slew rate | Fixed TSTEP | 2.5 | mV/μs | |||
| R(DIS) | Pulldown discharge resistance at SMPS2, SMPS4 output | SMPS turned off | 300 | Ω | ||
| SMPSx_SW, SMPS turned off. Pulldown is at the master phase output. | 9 | 22 | ||||
| R(SENSE) | Input resistance for remote sense/sense line | Between SMPS1_2_FDBK, SMPS1_2_FDBK_GND | 380 | 1300 | kΩ | |
| Between SMPS4_5_FDBK, SMPS4_5_FDBK_GND | 380 | 1300 | ||||
| SMPS3_FDBK input resistance | 380 | 1300 | ||||
| IQ(off) | Quiescent current – OFF mode | IL = 0 mA | 0.1 | 1 | µA | |
| IQ(on) | Quiescent current -ON mode, dual or triple phase | Eco-mode, device not switching, VO < 1.8 V | 13.5 | 19 | µA | |
| Eco-mode, device not switching, VO ≥ 1.8 V | 15 | 21 | ||||
| FORCED_PWM mode, IL= 0 mA, VI = 3.8 V, device switching, 1-phase operation | 11 | mA | ||||
| VSMPSPG | Powergood threshold | SMPS output voltage rising, referenced to programmed output voltage | –7.5% | |||
| SMPS output voltage falling, referenced to programmed output voltage | –12.5% | |||||
| IL_AVG_COMP | Powergood: GPADC monitoring SMPS | IL_AVG_COMP_rising | IOmax – 20% | IOmax | IOmax + 20% | |
| IL_AVG_COMP_falling, 3-A phase | IL_AVG_COMP_rising – 5% | |||||
| IL_AVG_COMP_falling, 2-A phase | IL_AVG_COMP_rising – 8% | |||||