ZHCSPA4 march 2023 TPS548C26
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Internal VCC LDO and Using an External Bias on VCC and VDRV Pin
- 7.3.2 Input Undervoltage Lockout (UVLO)
- 7.3.3 Set the Output Voltage
- 7.3.4 Differential Remote Sense and Feedback Divider
- 7.3.5 Start-up and Shutdown
- 7.3.6 Loop Compensation
- 7.3.7 Set Switching Frequency and Operation Mode
- 7.3.8 Switching Node (SW)
- 7.3.9 Overcurrent Limit and Low-side Current Sense
- 7.3.10 Negative Overcurrent Limit
- 7.3.11 Zero-Crossing Detection
- 7.3.12 Input Overvoltage Protection
- 7.3.13 Output Undervoltage and Overvoltage Protection
- 7.3.14 Overtemperature Protection
- 7.3.15 Power Good
- 7.4 Device Functional Modes
- 8 Application and Implementation
- 9 Device and Documentation Support
- 10Mechanical, Packaging, and Orderable Information
8.2.4 Application Curves
| PVIN = 12 V | VOUT = 1.1 V | |
| PVIN = 12 V | VOUT = 1.1 V | |
| PVIN = 12 V | VOUT = 1.1 V | |
| PVIN = 12 V | VOUT = 3.3 V |
| No DC Load Line (DCLL) |
| PVIN = 12 V | VOUT = 3.3 V |
| No DC Load Line (DCLL) |
Figure 8-12 ENABLE Start-Up Waveform, PVIN = 12 V, VOUT =
1.8 V
Figure 8-14 Output Voltage Ripple, 800 kHz FCCM, 35 A
Load, PVIN = 12 V, VOUT = 3.3 V
Figure 8-16 Output Voltage Ripple, DCM, No load, PVIN = 12
V, VOUT = 3.3 V
| PVIN = 12 V | VOUT = 1.1 V | |
| PVIN = 12 V | VOUT = 1.1 V | |
| PVIN = 12 V | VOUT = 1.1 V | |
| PVIN = 12 V | VOUT = 3.3 V |
| No DC Load Line (DCLL) |
| PVIN = 12 V | VOUT = 3.3 V |
| No DC Load Line (DCLL) |
Figure 8-13 ENABLE Shutdown Waveform, PVIN = 12 V, VOUT =
1.8 V
Figure 8-15 Output Voltage Ripple, 800 kHz FCCM, No load,
PVIN = 12 V, VOUT = 3.3 V