ZHCSR16 September 2022 TPS544C26
ADVANCE INFORMATION
| CMD Address | 7Dh |
| Write Transaction: | Write Byte |
| Read Transaction: | Read Byte |
| Format: | Unsigned Binary (1 byte) |
| NVM Backup: | No |
| Updates: | On-the-fly |
The STATUS_TEMPERATURE command returns one data byte with contents as follows. All supported bits can be cleared either by CLEAR_FAULTS, or individually by writing a "1" to the (7Dh) STATUS_TEMPERATURE register in their position. If a fault condition is still present when the corresponding bit is cleared, the fault bit is immediately set again.
Return to Supported I2C and Default Values.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| R/W | R/W | R | R | R | R | R | R |
| OTF_PROG | OTW_PROG | 0 | 0 | 0 | 0 | 0 | 0 |
| LEGEND: R/W = Read/Write; R = Read only |
| Bit | Field | Access | Reset | Description |
|---|---|---|---|---|
| 7 | OTF_PROG | R/W | 0b | 0b: Latched flag indicating an OT fault has not occurred. 1b: Latched flag indicating an OT fault has occurred on the Controller die. Note: A digital comparator on the Controller die is utilized to compare the output of the IC TEMP telemetry to the fault threshold selected in (4Fh) OT_FAULT_LIMIT register. This bit has no relationship with the overtemperature detection implemented on the Power Stage (PS) die. |
| 6 | OTW_PROG | R/W | 0b | 0b: Latched flag indicating an OT warn has not occurred. 1b: Latched flag indicating an OT warn has occurred on the Controller die. Note: A digital comparator on the Controller die is utilized to compare the output of the IC TEMP telemetry to the warning threshold selected in (51h) OT_WARN_LIMIT register. This bit has no relationship with the overtemperature detection implemented on the Power Stage (PS) die. |
| 5:0 | Not supported | R | 000000b | Not supported and always set to 0. |