SNVSBY3A November 2020 – April 2021 TLV840-Q1
PRODUCTION DATA
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Device Comparison
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
9.2.1 Design 1: Dual Rail Monitoring with Power-up Sequencing
A typical application for the TLV840-Q1 is
voltage rail monitoring and power-up sequencing as shown in
Figure 9-1. The TLV840-Q1 can be used to monitor any rail above 0.9 V. In this design application,
two
TLV840-Q1 devices monitor two separate voltage rails and
sequences the rails upon power-up. The TLV840MAPL29-Q1 is used to monitor the 3.3-V main
power rail and the TLV840MADL10-Q1 is used to monitor the 1.2-V rail provided by the LDO for
other system peripherals. The RESET output of the TLV840MAPL29-Q1 is
connected to the enable (EN) input of the LDO. A reset event is initiated on either voltage
supervisor when the VDD voltage is less than VIT-. For a system-wide reset event,
both MR pins are tied to the SYS_RST. For the
purpose of this application, the design detail on MR are not covered.
For more information on the function of MR, please see Section 8.3.3
Figure 9-1 TLV840-Q1 Voltage
Rail Monitor and Power-Up Sequencer Design Block Diagram