ZHCSRJ6D June 2010 – October 2024 TLV320AIC3104-Q1
PRODUCTION DATA
The TLV320AIC3104-Q1 requires a hardware reset after power-up for proper operation. After all power supplies are at their specified values, the RESET pin must be driven low for at least 10 ns. If this reset sequence is not performed, the TLV320AIC3104-Q1 may not respond properly to register reads or writes.
In cases where the ESD events generate a device reset, TI recommends to add at least a 1-nF capacitor connected between the RESET pin and DVSS. This capacitor avoids ESD events that could place the codec in default state. A 10-kΩ pullup resistor can be added to the RESET pin in addition to the capacitor.
This device has a software reset (page 0, register 1) that can be used by the host to reset all registers on page 0 and page 1 to their reset values. In cases where changes are needed only to routing or volume-control registers, the changes should be accomplished by writing directly to the appropriate registers rather than using the software or hardware reset.