Use Figure 9-1as a guide to integrate the hardware into the system.
Following the recommended
component placement, schematic layout and routing given in Figure 9-7, integrate the device and its supporting components into the
system PCB file.
Determining sample rate and
master clock frequency is required when powering up the device because all
internal timing is derived from the master clock. Refer to the Audio Clock
Generation section to obtain more information on how to configure
correctly the required clocks for the device.
As the TLV320AIC3104-Q1 is designed for low-power applications, when powered up,
the device has several features powered down. A correct routing of the
TLV320AIC3104-Q1 signals is achieved by a correct setting of the device
registers, powering up the required stages of the device and configuring the
internal switches to follow a desired route.