The TLV320ADC6120 is a high-performance, low-power, flexible, 2-channel, audio analog-to-digital converter (ADC) with extensive feature integration. This device is intended for applications in voice-activated systems, professional microphones, audio conferencing, portable computing, communication, and entertainment applications. The high dynamic range of the device enables far-field audio recording with high fidelity. This device integrates a host of features that reduces cost, board space, and power consumption in space-constrained, battery-powered, consumer, home, and industrial applications.

The TLV320ADC6120 consists of the following blocks:

• 2-channel, multibit, high-performance delta-sigma (ΔΣ) ADC
• Configurable single-ended or differential audio inputs
• Low-noise, programmable microphone bias output
• Dynamic range enhancer (DRE) to support a 123-dB dynamic range
• Automatic gain controller (AGC)
• Programmable decimation filters with a linear-phase filter or a low-latency filter
• Programmable channel gain, volume control, biquad filters for each channel
• Programmable phase and gain calibration with fine resolution for each channel
• Programmable high-pass filter (HPF), and digital channel mixer
• Pulse density modulation (PDM) microphone 4-channel interface with a high-performance decimation filter
• Integrated low-jitter phase-locked loop (PLL) supporting a wide range of system clocks
• Integrated digital and analog voltage regulators to support single-supply operation

Communication to the TLV320ADC6120 for configuring the control registers is supported using an I²C interface. The device supports a highly flexible audio serial interface [time-division multiplexing (TDM), I²S, or left-justified (LJ)] to transmit audio data seamlessly in the system across devices.

The TLV320ADC6120 can support multiple devices by sharing the common TDM bus across devices. Moreover, the device includes a daisy-chain feature as well. These features relax the shared TDM bus timing requirements and board design complexities when operating multiple devices for applications requiring high audio data bandwidth.

Table 8-1 lists the reference abbreviations used throughout this document to registers that control the device.