ZHCSMM9A December 2020 – June 2021 TLV320ADC6120
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
-
7 Specifications
- 7.1 Absolute Maximum Ratings
- 7.2 ESD Ratings
- 7.3 Recommended Operating Conditions
- 7.4 Thermal Information
- 7.5 Electrical Characteristics
- 7.6 Timing Requirements:?I2C Interface
- 7.7 Switching Characteristics: I2C Interface
- 7.8 Timing Requirements:?TDM, I2S or LJ Interface
- 7.9 Switching Characteristics: TDM, I2S or LJ Interface
- 7.10 Timing Requirements:?PDM Digital Microphone Interface
- 7.11 Switching Characteristics: PDM Digital Microphone Interface
- 7.12 Timing Diagrams
- 7.13 Typical Characteristics
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Serial Interfaces
- 8.3.2 Phase-Locked Loop (PLL) and Clock Generation
- 8.3.3 Input Channel Configurations
- 8.3.4 Reference Voltage
- 8.3.5 Programmable Microphone Bias
- 8.3.6
Signal-Chain Processing
- 8.3.6.1 Programmable Channel Gain and Digital Volume Control
- 8.3.6.2 Programmable Channel Gain Calibration
- 8.3.6.3 Programmable Channel Phase Calibration
- 8.3.6.4 Programmable Digital High-Pass Filter
- 8.3.6.5 Programmable Digital Biquad Filters
- 8.3.6.6 Programmable Channel Summer and Digital Mixer
- 8.3.6.7
Configurable Digital Decimation Filters
- 8.3.6.7.1
Linear Phase Filters
- 8.3.6.7.1.1 Sampling Rate: 7.35 kHz to 8 kHz
- 8.3.6.7.1.2 Sampling Rate: 14.7 kHz to 16 kHz
- 8.3.6.7.1.3 Sampling Rate: 22.05 kHz to 24 kHz
- 8.3.6.7.1.4 Sampling Rate: 29.4 kHz to 32 kHz
- 8.3.6.7.1.5 Sampling Rate: 44.1 kHz to 48 kHz
- 8.3.6.7.1.6 Sampling Rate: 88.2 kHz to 96 kHz
- 8.3.6.7.1.7 Sampling Rate: 176.4 kHz to 192 kHz
- 8.3.6.7.1.8 Sampling Rate: 352.8 kHz to 384 kHz
- 8.3.6.7.1.9 Sampling Rate: 705.6 kHz to 768 kHz
- 8.3.6.7.2 Low-Latency Filters
- 8.3.6.7.3
Ultra-Low Latency Filters
- 8.3.6.7.3.1 Sampling Rate: 14.7 kHz to 16 kHz
- 8.3.6.7.3.2 Sampling Rate: 22.05 kHz to 24 kHz
- 8.3.6.7.3.3 Sampling Rate: 29.4 kHz to 32 kHz
- 8.3.6.7.3.4 Sampling Rate: 44.1 kHz to 48 kHz
- 8.3.6.7.3.5 Sampling Rate: 88.2 kHz to 96 kHz
- 8.3.6.7.3.6 Sampling Rate: 176.4 kHz to 192 kHz
- 8.3.6.7.3.7 Sampling Rate: 352.8 kHz to 384 kHz
- 8.3.6.7.1
Linear Phase Filters
- 8.3.7 Dynamic Range Enhancer (DRE)
- 8.3.8 Dynamic Range Compressor (DRC)
- 8.3.9 Automatic Gain Controller (AGC)
- 8.3.10 Voice Activity Detection (VAD)
- 8.3.11 Digital PDM Microphone Record Channel
- 8.3.12 Interrupts, Status, and Digital I/O Pin Multiplexing
- 8.4 Device Functional Modes
- 8.5 Programming
- 8.6 Register Maps
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
8.3.6.6 Programmable Channel Summer and Digital Mixer
For applications that require an even higher SNR than that supported for each channel, the device digital summing mode can be used. In this mode, the digital record data are summed up across the channel with an equal weightage factor, which helps in reducing the effective record noise. Table 8-21 lists the configuration settings available for channel summing mode.
| P0_R107_D[3:2] : CH_SUM[1:0] | CHANNEL SUMMING MODE FOR INPUT CHANNELS | SNR AND DYNAMIC RANGE BOOST |
|---|---|---|
| 00 (default) | Channel summing mode is disabled | Not applicable |
| 01 | Output channel 1 = (input channel 1 + input channel 2) / 2 | Around 3-dB boost in SNR and dynamic range |
| Output channel 2 = (input channel 1 + input channel 2) / 2 | ||
| 10 | Reserved (do not use this setting) | Not applicable |
| 11 | Reserved (do not use this setting) | Not applicable |
The device additionally supports a fully programmable mixer feature that can mix the various input channels with their custom programmable scale factor to generate the final output channels. The programmable mixer feature is available only if CH_SUM[1:0] is set to 2'b00. The mixer function is supported for all input channels. Figure 8-18 shows a block diagram that describes the mixer 1 operation to generate output channel 1. The programmable coefficients for the mixer operation are located in the Section 8.6.4.3 section.
Figure 8-18 Programmable Digital Mixer Block DiagramA similar mixer operation is performed by mixer 2 to generate output channel 2.