ZHCSPI8D November 2021 – July 2022 TLC6984
PRODUCTION DATA
The TLC6984 implements a high speed dual-edge transmission interface (up to 25 MHz) to support high device count daisy-chained and high refresh rate while minimizing electrical-magnetic interference (EMI). SCLK must be continuous, no matter there are data on SIN or not, because SCLK is not only used to sample the data on SIN, but also used as a clock source to generate GCLK by internal frequency multiplier. Based on dual-edge CCSI protocol, all the commands/FC registers/SRAM data are written from the SIN input terminal, and all the FC registers/ LED open and short flag can be read out from the SOUT output terminal. Moreover, the device supports up to 160-MHz GCLK frequency and can achieve 16-bit PWM resolution, with 3840 Hz or even higher refresh rate.
Meanwhile, the TLC6984 integrates enhanced circuits and intelligent algorithms to solve the various display challenges in Narrow Pixel Pitch (NPP) LED display applications and mini and micro-LED products: dim at the first scan line, upper and downside ghosting, non-uniformity in low grayscale, coupling, caterpillar caused by open or short LEDs, which make the TLC6984 a perfect choice in such applications.The TLC6984 also implements LED open and weak, short and short detections and removals during operations and can also report this information out to the accompanying digital processor.