ZHCSHK8E october 2017 – july 2023 TAS2770
PRODUCTION DATA
ICLA starting time slot and enable.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| ICLA_USE_MAX | ICLA_SLOT[5:0] | ICLA_EN | |||||
| RW-0h | RW-0h | RW-0h | |||||
| LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 7 | ICLA_USE_MAX | RW | 0h | Inter chip limiter alignment min/max config 0b = Use the maximum of the ICLA group gain reduction 1b = Use the minimum of the ICLA group gain reduction |
| 6-1 | ICLA_SLOT[5:0] | RW | 0h | Inter chip limiter alignment starting time slot. |
| 0 | ICLA_EN | RW | 0h | Inter chip limiter alignment enable. 0b = Disabled 1b = Enabled |