ZHCSRD4I July 2003 – January 2023 SN65HVD1176 , SN75HVD1176
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP(1) | MAX | UNIT | |||
|---|---|---|---|---|---|---|---|---|
| DRIVER | ||||||||
| VO | Open-circuit output voltage | A or B | No load | 0 | VCC | V | ||
| |VOD(SS)| | Steady-state differential output voltage magnitude | RL = 54 ? | See Figure 7-1 | 2.1 | 2.9 | V | ||
| With common-mode loading, (VTEST from –7 V to 12 V) See Figure 7-2 | 2.1 | 2.7 | V | |||||
| Δ|VOD(SS)| | Change in steady-state differential output voltage between logic states | See Figure 7-1 and Figure 7-6 | –0.2 | 0 | 0.2 | V | ||
| VOC(SS) | Steady-state common-mode output voltage | See Figure 7-5 | 2 | 2.5 | 3 | V | ||
| ΔVOC(SS) | Change in steady-state common-mode output voltage | See Figure 7-5 | –0.2 | 0 | 0.2 | V | ||
| VOC(PP) | Peak-to-peak common-mode output voltage | See Figure 7-5 | 0.5 | V | ||||
| VOD(RING) | Differential output voltage over and under shoot | RL = 54 ?, CL = 50 pF See Figure 7-6 | 10% | VOD(PP) | ||||
| II | Input current | D, DE | –50 | 50 | μA | |||
| IOS(P) | Peak short-circuit output current | DE at VCC, See Figure 7-8 | VOS = –7 V to 12 V | –250 | 250 | mA | ||
| IOS(SS) | Steady-state short-circuit output current | DE at VCC, See Figure 7-8 | VOS > 4 V, Output driving low | 60 | 90 | 135 | mA | |
| VOS < 1 V, Output driving high | –135 | –90 | –60 | mA | ||||
| RECEIVER | ||||||||
| VIT(+) | Positive-going differential input voltage threshold | SeeFigure 7-9 | VO = 2.4 V, IO = –8 mA | –80 | –20 | mV | ||
| VIT(–) | Negative-going differential input voltage threshold | VO = 0.4 V, IO = 8 mA | –200 | –120 | mV | |||
| VHYS | Hysteresis voltage (VIT+ – VIT-) | 40 | mV | |||||
| VOH | High-level output voltage | VID = 200 mV, IOH = –8 mA, See Figure 7-9 | 4 | 4.6 | V | |||
| VOL | Low-level output voltage | VID = –200 mV, IOL = 8 mA, See Figure 7-9 | 0.2 | 0.4 | V | |||
| IA, IB | Bus pin input current | VI = –7 V to 12 V, Other input = 0 V | VCC = 4.75 V to 5.25 V | –160 | 200 | μA | ||
| IA(OFF) IB(OFF) | VCC = 0 V | –160 | 200 | |||||
| II | Receiver enable input current | RE | –50 | 50 | μA | |||
| IOZ | High-impedance - state output current | RE = VCC | –1 | 1 | μA | |||
| RI | Input resistance | 60 | k? | |||||
| CID | Differential input capacitance | Test input signal is a 1.5-MHz sine wave with amplitude 1 VPP, capacitance measured across A and B | 7 | 10 | pF | |||
| CMR | Common mode rejection | See Figure 7-11 | 4 | V | ||||