ZHCSRD4I July 2003 – January 2023 SN65HVD1176 , SN75HVD1176
PRODUCTION DATA
| INPUT | ENABLE | OUTPUTS | |
|---|---|---|---|
| D | DE | A | B |
| H | H | H | L |
| L | H | L | H |
| X | L | Z | Z |
| X | OPEN | Z | Z |
| OPEN | H | H | L |
| DIFFRENTIAL INPUT VID = (VA – VB) | ENABLE RE | OUTPUT R |
|---|---|---|
| VID ≥ –0.02 V | L | H |
| –0.2 V < VID < –0.02 V | L | ? |
| VID ≤ –0.2 V | L | L |
| X | H | Z |
| X | OPEN | Z |
| Open Circuit | L | H |
| Short Circuit | L | H |
| Idle (terminated) bus | L | H |
Figure 7-2 Equivalent Input and Output Schematic Diagrams