ZHCSRD4I July 2003 – January 2023 SN65HVD1176 , SN75HVD1176
PRODUCTION DATA
Test load capacitance includes probe and jig capacitance (unless otherwise specified).
Signal generator characteristics: rise and fall time < 6 ns, pulse rate 100 kHz, 50% duty cycle, Zo = 50 ? (unless otherwise specified).
Figure 7-1 Driver Test Circuit, VOD and VOC Without Common-Mode Loading
Figure 7-2 Driver Test Circuit, VOD With Common-Mode Loading
Figure 7-3 Driver Switching Test Circuit and Rise/Fall Time Measurement
Figure 7-4 Driver Switching Waveforms for Propagation Delay and Output Midpoint Time Measurements
Figure 7-5 Driver VOC Test Circuit and Waveforms
Figure 7-7 Driver Enable/Disable Test
Figure 7-8 Driver Short-Circuit Test Circuit and Waveforms (Short Circuit applied at Time t = 0)
Figure 7-9 Receiver DC Parameter Definitions
Figure 7-10 Receiver Switching Test Circuit and Waveforms
Figure 7-11 Receiver Common-Mode Rejection Test Circuit
Figure 7-12 Receiver Enable Time From Standby (Driver Disabled)
Figure 7-13 Receiver Enable Test Circuit and Waveforms, Data Output High (Driver Active)
Figure 7-14 Receiver Enable Test Circuit and Waveforms, Data Output Low (Driver Active)
Figure 7-15 Test Circuit and Waveforms, Transient Overvoltage Test