ZHCSCB3D March 2014 – March 2018 PCM1860 , PCM1861 , PCM1862 , PCM1863 , PCM1864 , PCM1865
PRODUCTION DATA.
| PARAMETER(1) | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|
| tBCKP | BCK period | 1 / (64 × fS) | ns | ||
| tBCKH | BCK pulse duration high | 1.5 × tSCKI | ns | ||
| tBCKL | BCK pulse duration low | 1.5 × tSCKI | ns | ||
| tLRSU | LRCK set up time to BCK rising edge | 50 | ns | ||
| tLRHD | LRCK hold time to BCK rising edge | 10 | ns | ||
| tLRCP | LRCK period | 10 | µs | ||
| tCKDO | Delay time BCK falling edge to DOUT valid | –10 | 40 | ns | |
| tLRDO | Delay time LRCK edge to DOUT valid | –10 | 40 | ns | |
| tR | Rise time of all signals | 20 | ns | ||
| tF | Fall time of all signals | 20 | ns | ||
Figure 3. Audio Data Interface Timing, Slave Mode: LRCK and BCK as Inputs