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SNVSB23 March 2018 LP87521-Q1 , LP87522-Q1 , LP87523-Q1 , LP87524-Q1 , LP87525-Q1

PRODUCTION DATA.

封裝選項

請參考 PDF 數據表獲取器件具體的封裝圖。

機械數據 (封裝 | 引腳)

RNF|26

散熱焊盤機械數據 (封裝 | 引腳)

訂購信息

8.3.5 Enable and Disable Sequences

The LP8752x-Q1 device supports start-up and shutdown sequencing with programmable delays for different regulator outputs using one EN1, EN2, EN3 control signal. The regulator is selected for delayed control with:

EN_BUCKx = 1 (in BUCKx_CTRL1 register)
EN_PIN_CTRLx = 1 (in BUCKx_CTRL1 register)
EN_ROOF_FLOORx = 0 (in BUCKx_CTRL1 register)
BUCKx_VSET[7:0] = Required voltage when ENx is high (in BUCKx_VOUT register)
The ENABLE pin for control is selected with BUCKx_EN_PIN_SELECT[1:0] (in BUCKx_CTRL1 register)
The delay from rising edge of ENx signal to the regulator enable is set by BUCKx_STARTUP_DELAY[3:0] bits (in BUCKx_DELAY register) and
The delay from falling edge of ENx signal to the regulator disable is set by BUCKx_SHUTDOWN_DELAY[3:0] bits (in BUCKx_DELAY register)

There are four time steps available for start-up and shutdown sequences. The delay times are selected with DOUBLE_DELAY bit in CONFIG register and HALF_DELAY bit in PGOOD_CTRL2 register as shown in Table 4.

Table 4. Start-up and Shutdown Delays

X_STARTUP_DELAY or X_SHUTDOWN_DELAY	DOUBLE_DELAY = 0h HALF_DELAY = 1h	DOUBLE_DELAY = 1h HALF_DELAY = 1h	DOUBLE_DELAY = 0h HALF_DELAY = 0h	DOUBLE_DELAY = 1h HALF_DELAY = 0h
0h	0 ms	0 ms	0 ms	0 ms
1h	0.32 ms	0.64 ms	1 ms	2 ms
2h	0.64 ms	1.28 ms	2 ms	4 ms
3h	0.96 ms	1.92 ms	3 ms	6 ms
4h	1.28 ms	2.56 ms	4 ms	8 ms
5h	1.6 ms	3.2 ms	5 ms	10 ms
6h	1.92 ms	3.84 ms	6 ms	12 ms
7h	2.24 ms	4.48 ms	7 ms	14 ms
8h	2.56 ms	5.12 ms	8 ms	16 ms
9h	2.88 ms	5.76 ms	9 ms	18 ms
Ah	3.2 ms	6.4 ms	10 ms	20 ms
Bh	3.52 ms	7.04 ms	11 ms	22 ms
Ch	3.84 ms	7.68 ms	12 ms	24 ms
dh	4.16 ms	8.32 ms	13 ms	26 ms
Eh	4.48 ms	8.96 ms	14 ms	28 ms
Fh	4.8 ms	9.6 ms	15 ms	30 ms

An example of start-up and shutdown sequences is shown in Figure 16 and Figure 17. The start-up and shutdown delays for the BUCK0, BUCK1 regulators are 1 ms and 4 ms and for the BUCK2, BUCK3 regulators 3 ms and 1 ms. The delay settings are used only for enable/disable control with EN1, EN2, EN3 signals, not for Roof/Floor control.

LP87521-Q1 LP87522-Q1 LP87523-Q1 LP87524-Q1 LP87525-Q1 Sequencing.gif

Figure 16. Typical Start-Up and Shutdown Sequencing

LP87521-Q1 LP87522-Q1 LP87523-Q1 LP87524-Q1 LP87525-Q1 Sequencing_2.gif

Figure 17. Start-Up and Shutdown Sequencing With Short ENx Low and High Periods