ZHCS527G January 2007 – April 2025 LM5574
PRODUCTION DATA
- 1
- 1 特性
- 2 應用
- 3 說明
- 4 Pin Configuration and Functions
- 5 Specifications
- 6 Detailed Description
-
7 Application and Implementation
- 7.1 Application Information
- 7.2
Typical Application
- 7.2.1 Design Requirements
- 7.2.2
Detailed Design Procedure
- 7.2.2.1 Custom Design With WEBENCH? Tools
- 7.2.2.2 External Components
- 7.2.2.3 R3 (R)T
- 7.2.2.4 L1-Inductor
- 7.2.2.5 C3 (C)RAMP
- 7.2.2.6 C9-Output Capacitor
- 7.2.2.7 D1-Async Diode
- 7.2.2.8 C1-Input Capacitor
- 7.2.2.9 C8-VCC Capacitor
- 7.2.2.10 C7-BST Capacitor
- 7.2.2.11 C4- SS Capacitor
- 7.2.2.12 R5, R6- Feedback Resistors
- 7.2.2.13 R1, R2, C2-SD Pin Components
- 7.2.2.14 R4, C5, C6-Compensation Components
- 7.2.2.15 Bias Power Dissipation Reduction
- 7.2.3 Application Curves
- 7.3 Power Supply Recommendations
- 7.4 Layout
- 8 Device and Documentation Support
- 9 Revision History
- 10Mechanical, Packaging, and Orderable Information
7.2.2.15 Bias Power Dissipation Reduction
Buck regulators operating with high input voltage can dissipate an appreciable amount of power for the bias of the IC. The VCC regulator must step-down the input voltage VIN to a nominal VCC level of 7V. The large voltage drop across the VCC regulator translates into a large power dissipation within the VCC regulator. There are several techniques that can significantly reduce this bias regulator power dissipation. Figure 7-6 and Figure 7-7 depict two methods to bias the IC from the output voltage. In each case the internal VCC regulator is used to initially bias the VCC pin. After the output voltage is established, the VCC pin potential is raised above the nominal 7V regulation level, which effectively disables the internal VCC regulator. The voltage applied to the VCC pin must never exceed 14V. The VCC voltage must never be larger than the VIN voltage.
Figure 7-6 Vcc Bias From Vout for 8V < Vout <
14V
Figure 7-7 Vcc Bias With Additional Winding on the Output Inductor