4 Pin Configuration and Functions

Figure 4-1 PW Package16-Pin TSSOP(Top View)

Table 4-1 Pin Functions

PIN		TYPE⁽¹⁾	DESCRIPTION	APPLICATION INFORMATION
NO.	NAME	TYPE⁽¹⁾	DESCRIPTION	APPLICATION INFORMATION
1	VCC	O	Output of the bias regulator	Vcc monitors Vin up to 9V. Beyond 9V, Vcc is regulated to 7V. A 0.1μF to 1μF ceramic decoupling capacitor is required. An external voltage (7.5V – 14V) can be applied to this pin to reduce internal power dissipation.
2	SD	I	Shutdown or UVLO input	If the SD pin voltage is less than 0.7V, the regulator is in a low power state. If the SD pin voltage is between 0.7V and 1.225V, the regulator is in standby mode. If the SD pin voltage is more than 1.225V, the regulator is operational. An external voltage divider can be used to set a line undervoltage shutdown threshold. If the SD pin is left open circuit, a 5μA pullup current source configures the regulator fully operational.
3	Vin	I	Input supply voltage	Nominal operating range: 6V to 75V
4	SYNC	I	Oscillator synchronization input or output	The internal oscillator can be synchronized to an external clock with an external pulldown device. Multiple LM5574 devices can be synchronized together by connection of the SYNC pins.
5	COMP	O	Output of the internal error amplifier	The loop compensation network must be connected between this pin and the FB pin.
6	FB	I	Feedback signal from the regulated output	This pin is connected to the inverting input of the internal error amplifier. The regulation threshold is 1.225V.
7	RT	I	Internal oscillator frequency set input	The internal oscillator is set with a single resistor connected between this pin and the AGND pin.
8	RAMP	O	Ramp control signal	An external capacitor connected between this pin and the AGND pin sets the ramp slope used for current mode control. Recommended capacitor range 50pF to 2000pF.
9	AGND	GND	Analog ground	Internal reference for the regulator control functions
10	SS	O	Soft-start	An external capacitor and an internal 10μA current source set the time constant for the rise of the error amp reference. The SS pin is held low during standby, Vcc UVLO, and thermal shutdown.
11	OUT	O	Output voltage connection	Connect directly to the regulated output voltage.
12	PGND	GND	Power ground	Low-side reference for the PRE switch and the IS sense resistor.
13	IS	I	Current sense	Current measurement connection for the re-circulating diode. An internal sense resistor and a sample and hold circuit sense the diode current near the conclusion of the off-time. This current measurement provides the DC level of the emulated current ramp.
14	SW	O	Switching node	The source terminal of the internal buck switch. The SW pin must be connected to the external Schottky diode and to the buck inductor.
15	PRE	O	Pre-charge assist for the bootstrap capacitor	This open-drain output can be connected to SW pin to help charging the bootstrap capacitor during very light load conditions or in applications where the output can be pre-charged before the LM5574 is enabled. An internal pre-charge MOSFET is turned on for 250ns each cycle just prior to the on-time interval of the buck switch.
16	BST	I	Boost input for bootstrap capacitor	An external capacitor is required between the BST and the SW pins. TI recommends a 0.022μF ceramic capacitor. The capacitor is charged from Vcc through an internal diode during the off-time of the buck switch.

(1) I = input, O = output, GND = ground