ZHCS810H January 2012 – February 2018 DS125DF410
PRODUCTION DATA.
Register 0x09, bit 2, and Register 0x18, bits 6:4
In normal operation, the DS125DF410 sets its VCO divider to the correct divide ratio, either 1, 2, 4, 8, or 16, depending upon the bit rate of the signal at the channel input. It is possible to override the divider selection. This might be desired if the VCO is set to free-run, for example, to output a signal at a sub-harmonic of the actual VCO frequency.
In order to override the VCO divider settings, first set bit 2 of register 0x09. This is the VCO divider override enable. Once this bit is set, the VCO divider setting is controlled by the value in register 0x18, bits 6:4. The valid values for this three-bit field are 0x0 to 0x4. The mapping of the bit field values to the divider ratio is shown in Table 7.
| BIT FIELD VALUE | DIVIDER RATIO |
|---|---|
| 0 | 1 |
| 1 | 2 |
| 2 | 4 |
| 3 | 8 |
| 4 | 16 |
In normal operation, the DS125DF410 will determine the required VCO divider ratio automatically. The most common application for overriding the divider ratio is when the VCO is set to free-run. Normally the divider ratio should not be overridden except in this case.