ZHCS810H January 2012 – February 2018 DS125DF410
PRODUCTION DATA.
Register 0x00, bits 7:4 and register 0x06, bits 3:0
In order to communicate with the DS125DF410 over the SMBus, it is necessary for the SMBus controller to know the address of the DS125DF410. The address strap observation bits in control/shared register 0x00 are primarily useful as a test of SMBus operation. There is no way to get the DS125DF410 to tell you what its SMBus address is unless you already know what it is.
In order to use the address strap observation bits of control/shared register 0x00, it is necessary first to set the diagnostic test control bits of control/shared register 0x06. This four-bit field should be written with a value of 0xa. When this value is written to bits 3:0 of control/shared register 0x06, then the value of the SMBus address straps can be read in register 0x00, bits 7:4. The value read will be the same as the value present on the ADDR3:ADDR0 lines when the DS125DF410 was powered up. For example, if a value of 0x1 is read from control/shared register 0x00, bits 7:4, then at power-up the ADDR0 line was set to 1 and the other address lines, ADDR3:ADDR1, were all set to 0. The DS125DF410 is set to an SMBus Write address of 0x32.