ZHCSCS1D June 2014 – November 2020 DRV8801A-Q1
PRODUCTION DATA
The DRV8801A-Q1 device is active unless the nSLEEP pin is brought logic low. In sleep mode the charge pump is disabled and the H-bridge FETs are disabled hi-Z. The DRV8801A-Q1 device is brought out of sleep mode automatically if nSLEEP is brought logic high.