ZHCSCS1D June 2014 – November 2020 DRV8801A-Q1
PRODUCTION DATA
| PIN | TYPE | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| CP1 | 10 | — | Charge pump switching node. Connect a X7R, 0.1-μF, VBB-rated ceramic capacitor from CP1 to CP2. |
| CP2 | 11 | — | |
| ENABLE | 4 | I | Enables OUTA and OUTB drivers |
| GND | 2 | PWR | Ground |
| 12 | |||
| MODE 1 | 16 | I | Mode logic input |
| MODE 2 | 5 | I | Mode 2 logic input |
| nFAULT | 15 | OD | Fault indication. Pulled logic low with fault condition; open-drain output requires an external pullup resistor. |
| nSLEEP | 3 | I | Sleep mode input. Logic high to enable device; logic low to enter low-power sleep mode; internal pulldown resistor. |
| OUTA | 6 | O | DMOS full-bridge output positive. H-Bridge output A |
| OUTB | 9 | O | DMOS full-bridge output negative. H-Bridge output B |
| PHASE | 1 | I | Phase logic input for direction control |
| SENSE | 7 | IO | Sense power return |
| VBB | 8 | PWR | Driver supply voltage. Bypass to GND with 0.1-μF ceramic capacitors plus a bulk capacitor rated for VBB. |
| VCP | 13 | — | Charge pump reservoir capacitor pin. Connect a X7R, 0.1-μF, 16-V ceramic capacitor to VBB. |
| VPROPI | 14 | O | Winding current proportional voltage output |
| Thermal pad | — | Exposed pad for thermal dissipation; connect to GND pins. | |