ZHCSJ46F December 2016 – December 2018 DRA74P , DRA75P
ADVANCE INFORMATION for pre-production products; subject to change without notice.
| PARAMETER | MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|---|
| Signal Names in MUXMODE 0: rtc_osc_xi_clkin32 / rtc_osc_xo; | ||||||
| Balls: AE14 / AD14; | ||||||
| 1.8-V Mode | ||||||
| VIH | Input high-level threshold | 0.65 × VDDS | V | |||
| VIL | Input low-level threshold | 0.35 × VDDS | V | |||
| VHYS | Input hysteresis voltage | 150 | mV | |||
| CPAD | Pad capacitance (including package capacitance) | 3 | pF | |||